EPM5192LC-35 vs EPM5192LC-M091A 比較
詳細な並列比較: EPM5192LC-35 メーカー: Altera および EPM5192LC-M091A メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192LC-35 | EPM5192LC-M091A |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $15.25 | $62.00 |
| Series | MAX 5000 | — |
| Family | MAX 5000 CPLD | — |
| Logic Elements / Macrocells | 192 macrocells | — |
| Pin-to-Pin Delay (tPD) | 35 ns | — |
| Speed Grade | -35 | — |
| Programmable Type | UV-Erasable / OTP (EPROM-based) | — |
| Package Type | JLCC (J-Lead Ceramic Chip Carrier) | — |
| 実装タイプ | Surface Mount | — |
| Logic Voltage | 5 V TTL-compatible I/O | — |
| 動作温度 | Commercial (0C to +70C) per LC suffix | [DATA_NEEDED: operating temperature grade] |
| Programming Method | Altera legacy programmer (EPROM-based) | — |
| Architecture | LAB-based with Programmable Interconnect Array (PIA) | — |
| I/O Standard | TTL | — |
| RoHS ステータス | Non-compliant (ceramic hermetic package) | [DATA_NEEDED: RoHS status for EPM5192LC-M091A] |
| ライフサイクル状態 | Obsolete - last-time-buy stock only | — |
| Datasheet Document | Altera MAX 5000 family datasheet (per alldatasheet.com) | — |
| Device Family | — | MAX 5000 EPLD |
| Macrocells | — | 192 |
| User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| Logic Array Blocks (LABs) | — | 12 |
| Global Clock Inputs | — | 1 |
| Propagation Delay (tpd) | — | 55 ns (typical, MAX 5000 family) |
| Supply Voltage (Vcc) | — | 5 V |
| Technology | — | UV-erasable CMOS, EPROM-based |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| パッケージ | — | LC (custom pin-grid / customer-specific, M091A designation) |
| ピン数 | — | [DATA_NEEDED: pin count of LC-M091A package] |
| Configuration Memory | — | Non-volatile EPROM (UV-erasable) |
| Development Tool | — | Altera MAX+PLUS II (legacy) |