EPM5192LC-35 vs EPM5192LC-M091A 비교

다음의 상세 나란히 비교: EPM5192LC-35 제조: Altera 및 EPM5192LC-M091A 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM5192LC-35 EPM5192LC-M091A
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $15.25 $62.00
Series MAX 5000 —
Family MAX 5000 CPLD —
Logic Elements / Macrocells 192 macrocells —
Pin-to-Pin Delay (tPD) 35 ns —
Speed Grade -35 —
Programmable Type UV-Erasable / OTP (EPROM-based) —
Package Type JLCC (J-Lead Ceramic Chip Carrier) —
실장 유형 Surface Mount —
Logic Voltage 5 V TTL-compatible I/O —
동작 온도 Commercial (0C to +70C) per LC suffix [DATA_NEEDED: operating temperature grade]
Programming Method Altera legacy programmer (EPROM-based) —
Architecture LAB-based with Programmable Interconnect Array (PIA) —
I/O Standard TTL —
RoHS 상태 Non-compliant (ceramic hermetic package) [DATA_NEEDED: RoHS status for EPM5192LC-M091A]
수명 주기 상태 Obsolete - last-time-buy stock only —
Datasheet Document Altera MAX 5000 family datasheet (per alldatasheet.com) —
Device Family — MAX 5000 EPLD
Macrocells — 192
User I/O Pins — 64
Dedicated Inputs — 7
Logic Array Blocks (LABs) — 12
Global Clock Inputs — 1
Propagation Delay (tpd) — 55 ns (typical, MAX 5000 family)
Supply Voltage (Vcc) — 5 V
Technology — UV-erasable CMOS, EPROM-based
Interconnect — Programmable Interconnect Array (PIA)
패키지 — LC (custom pin-grid / customer-specific, M091A designation)
핀 수 — [DATA_NEEDED: pin count of LC-M091A package]
Configuration Memory — Non-volatile EPROM (UV-erasable)
Development Tool — Altera MAX+PLUS II (legacy)

데이터시트 & 자료

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