EPM5192LC84-2 vs EPM5192LC84 比較
詳細な並列比較: EPM5192LC84-2 メーカー: Altera および EPM5192LC84 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192LC84-2 | EPM5192LC84 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $7.10 | $15.95 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (UV-Erasable / OTP Complex PLD) | — |
| Macrocells | 192 | — |
| パッケージ | 84-pin PLCC (LC) | LCC-84 (PQCC84, MS-018) |
| Speed Grade | -2 | — |
| 電源電圧 | 5 V (TTL-compatible I/O) | [DATA_NEEDED: VCC range] |
| Technology | CMOS, UV-erasable / OTP | — |
| Logic Elements | AND-OR array with macrocell flip-flops | — |
| Programming Method | Altera legacy programmer (JEDEC bitstream) | — |
| 動作温度 | Commercial (0C to +70C) | [DATA_NEEDED: operating temperature range] |
| 実装タイプ | Surface Mount | Surface Mount (Socket-compatible) |
| RoHS ステータス | Non-compliant (SnPb lead finish typical for this vintage) | unknown |
| ライフサイクル状態 | Obsolete (last Altera MAX 5000 production) | — |
| JTAG Support | Vendor-specific programming interface (pre-IEEE 1532) | — |
| I/O Standard | TTL, 5V CMOS-compatible | — |
| Product Type | — | Complex Programmable Logic Device (CPLD) |
| Macrocells (Logic Cells) | — | 192 |
| Propagation Delay (tPD) | — | 55 ns |
| Process Technology | — | CMOS |
| Programmability | — | OTP / UV-Erasable |
| ピン数 | — | 84 |
| User I/O | — | [DATA_NEEDED: max user I/O count] |
| Configuration Memory | — | EPROM / UV-Erasable |
| Programming Interface | — | JTAG / Altera legacy (MAX+PLUS II baseline) |
| MSLレベル | — | [DATA_NEEDED: MSL rating] |