EPM5192LI-1 vs EPM5192IC-1 比較
詳細な並列比較: EPM5192LI-1 メーカー: Altera および EPM5192IC-1 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192LI-1 | EPM5192IC-1 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $16.40 | $13.95 |
| Family | MAX 5000 | MAX 5000 EPLD |
| Device Type | EPLD (UV-Erasable/OTP Complex PLD) | — |
| Usable Gates | 3,750 | 3750 |
| Macrocells | 192 | 192 |
| Maximum Toggle Frequency | 40 MHz | — |
| 電源電圧 | 5 V | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD in ns at -1 grade] | — |
| User I/O Pins | [DATA_NEEDED: user I/O count for JLCC variant] | — |
| Package Type | JLCC (windowed, ceramic, UV-erasable) | — |
| Process Technology | CMOS EPROM, UV-erasable | — |
| Speed Grade | -1 | — |
| 動作温度 | [DATA_NEEDED: industrial vs military range] | -40C to +85C (industrial) |
| ピン数 | [DATA_NEEDED: pin count of LI package] | — |
| 実装タイプ | Surface Mount (JLCC with J-leads) | — |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status of ceramic LI variant] | — |
| Lead Free | [DATA_NEEDED: lead-free] | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| Architecture | EEPROM/EPROM-based, non-volatile, instant-on | — |
| Dedicated Inputs | — | 7 |
| I/O Pins | — | 64 |
| Pin-to-Pin Delay (tPD) | — | 15 ns (max, -1 speed grade) |
| Counter Frequency (fCNT) | — | 76.9 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (nominal 5 V) |
| Technology | — | CMOS, UV-erasable, in-system programmable |
| パッケージ | — | 68-pin ceramic J-lead (IC-1 suffix) |
| Programming Interface | — | JTAG / IEEE Std 1149.1 boundary scan |
| Security Bit | — | Yes (design protection) |
| Supply Current (Icc, typical) | — | [DATA_NEEDED: Icc] mA |
| Output Drive Current (IOH/IOL) | — | [DATA_NEEDED: IOH/IOL] mA |