EPM570T144C3N vs EPM570T144C5N 比較
詳細な並列比較: EPM570T144C3N メーカー: Altera および EPM570T144C5N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM570T144C3N | EPM570T144C5N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.60 | $9.35 |
| Family | MAX II | MAX II |
| Device | EPM570 | — |
| Logic Elements | 570 | — |
| Typical Macrocells | 440 | — |
| User I/Os | 116 | 116 |
| User Flash Memory (UFM) | 8 Kbits | — |
| Propagation Delay (tPD) | 5.4 ns (max) | 5.5 ns (typical, [DATA_NEEDED: exact speed grade]) |
| Maximum Frequency (fMAX) | 300 MHz (typ) | 201.1 MHz |
| Core Voltage | 3.3 V | — |
| 動作温度 | 0C to +85C (commercial) | 0 °C to +85 °C (commercial, C5 grade) |
| パッケージ | TQFP-144 | TQFP-144 (20 × 20 mm, 0.5 mm pitch) |
| Process | 0.18 µm, 6-layer-metal flash CMOS | — |
| Programming Interface | JTAG (IEEE 1149.1), ISP | IEEE 1149.1 JTAG (in-system programmable) |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | Compliant | Compliant |
| Series | — | MAX II Device |
| Logic Elements (LEs) | — | 570 |
| Macrocells | — | 440 |
| Internal User Flash Memory | — | 8 Kbit |
| Global Clocks | — | 4 |
| Process Technology | — | 0.18 µm 6-layer-metal flash |
| Core Voltage (VCCINT) | — | 1.8 V (typical, internally regulated) |
| I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-voltage, per bank) |
| Maximum User I/O Pins | — | 116 |
| Configuration Storage | — | On-chip non-volatile flash |
| Supported I/O Standards | — | LVCMOS, LVTTL, PCI, LVDS, SSTL (per bank VCCIO) |
| Lead-Free | — | Yes |
| MSLレベル | — | 3 (per JEDEC J-STD-020) |
| Design Software | — | Intel Quartus II (MAX II device support) |