EPM7096LC84-15 vs EPM7096LC84-10 比較
詳細な並列比較: EPM7096LC84-15 メーカー: Altera および EPM7096LC84-10 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM7096LC84-15 | EPM7096LC84-10 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.85 | $5.10 |
| Family | MAX 7000 | MAX 7000 |
| Series | MAX 7000 (second-generation MAX architecture) | — |
| Macro Cells | 96 | — |
| Logic Array Blocks (LABs) | 4 | 4 |
| Usable Gates | 1,800 | — |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | — |
| Maximum Operating Frequency | 76.9 MHz | — |
| User I/O Pins | 68 (36 per LAB, [DATA_NEEDED: exact LAB-level split]) | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 5.0 V nominal (4.75 V - 5.25 V) |
| Programmable Type | EE PLD (in-system programmable via JTAG) | — |
| Programming Interface | IEEE Std. 1149.1 JTAG | — |
| 動作温度 | 0C to +70C (commercial) | — |
| パッケージ / ケース | 84-PLCC (J-Lead) | — |
| Supplier Device Package | 84-PLCC (29.31 x 29.31 mm) | — |
| 実装タイプ | Surface Mount | Surface Mount (PLCC socket or SMT) |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| Erase/Program Endurance | [DATA_NEEDED: erase/program cycle count] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 96 |
| Maximum User I/O Pins | — | 36 |
| Propagation Delay (tPD) | — | 10 ns (-10 speed grade) |
| パッケージ | — | 84-PLCC (J-Lead) |
| Process Technology | — | EEPROM-based, 5.0 V low-power CMOS (L) |
| In-System Programmability | — | Yes, via IEEE 1149.1 JTAG |
| MultiVolt I/O | — | 2.5 V / 3.3 V / 5.0 V mixed-voltage interface |
| 動作温度範囲 | — | 0C to +70C (Commercial, 'C') |
| Configuration Memory | — | Non-volatile EEPROM (instant-on) |
| Programmable Interconnect | — | PIA (Programmable Interconnect Array) |