EPM7096LC84-15 vs EPM7096LC84-10 对比
详细并排对比 EPM7096LC84-15 出自 Altera 和 EPM7096LC84-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM7096LC84-15 | EPM7096LC84-10 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.85 | $5.10 |
| Family | MAX 7000 | MAX 7000 |
| Series | MAX 7000 (second-generation MAX architecture) | — |
| Macro Cells | 96 | — |
| Logic Array Blocks (LABs) | 4 | 4 |
| Usable Gates | 1,800 | — |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | — |
| Maximum Operating Frequency | 76.9 MHz | — |
| User I/O Pins | 68 (36 per LAB, [DATA_NEEDED: exact LAB-level split]) | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 5.0 V nominal (4.75 V - 5.25 V) |
| Programmable Type | EE PLD (in-system programmable via JTAG) | — |
| Programming Interface | IEEE Std. 1149.1 JTAG | — |
| 工作温度 | 0C to +70C (commercial) | — |
| 封装 / 外壳 | 84-PLCC (J-Lead) | — |
| Supplier Device Package | 84-PLCC (29.31 x 29.31 mm) | — |
| 安装类型 | Surface Mount | Surface Mount (PLCC socket or SMT) |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| Erase/Program Endurance | [DATA_NEEDED: erase/program cycle count] | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 96 |
| Maximum User I/O Pins | — | 36 |
| Propagation Delay (tPD) | — | 10 ns (-10 speed grade) |
| 封装 | — | 84-PLCC (J-Lead) |
| Process Technology | — | EEPROM-based, 5.0 V low-power CMOS (L) |
| In-System Programmability | — | Yes, via IEEE 1149.1 JTAG |
| MultiVolt I/O | — | 2.5 V / 3.3 V / 5.0 V mixed-voltage interface |
| 工作温度范围 | — | 0C to +70C (Commercial, 'C') |
| Configuration Memory | — | Non-volatile EEPROM (instant-on) |
| Programmable Interconnect | — | PIA (Programmable Interconnect Array) |