EPM7096LC84-15 vs EPM7096LC84-10 Comparison

Detailed side-by-side comparison of EPM7096LC84-15 by Altera and EPM7096LC84-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7096LC84-15 EPM7096LC84-10
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $9.85 $5.10
Family MAX 7000 MAX 7000
Series MAX 7000 (second-generation MAX architecture) β€”
Macro Cells 96 β€”
Logic Array Blocks (LABs) 4 4
Usable Gates 1,800 β€”
Pin-to-Pin Propagation Delay (tPD) 15 ns β€”
Maximum Operating Frequency 76.9 MHz β€”
User I/O Pins 68 (36 per LAB, [DATA_NEEDED: exact LAB-level split]) β€”
Supply Voltage (VCC) 4.75 V to 5.25 V 5.0 V nominal (4.75 V - 5.25 V)
Programmable Type EE PLD (in-system programmable via JTAG) β€”
Programming Interface IEEE Std. 1149.1 JTAG β€”
Operating Temperature 0C to +70C (commercial) β€”
Package / Case 84-PLCC (J-Lead) β€”
Supplier Device Package 84-PLCC (29.31 x 29.31 mm) β€”
Mounting Type Surface Mount Surface Mount (PLCC socket or SMT)
Data Retention [DATA_NEEDED: data retention years] β€”
Erase/Program Endurance [DATA_NEEDED: erase/program cycle count] β€”
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Device Type β€” CPLD (Complex Programmable Logic Device)
Macrocells β€” 96
Maximum User I/O Pins β€” 36
Propagation Delay (tPD) β€” 10 ns (-10 speed grade)
Package β€” 84-PLCC (J-Lead)
Process Technology β€” EEPROM-based, 5.0 V low-power CMOS (L)
In-System Programmability β€” Yes, via IEEE 1149.1 JTAG
MultiVolt I/O β€” 2.5 V / 3.3 V / 5.0 V mixed-voltage interface
Operating Temperature Range β€” 0C to +70C (Commercial, 'C')
Configuration Memory β€” Non-volatile EEPROM (instant-on)
Programmable Interconnect β€” PIA (Programmable Interconnect Array)

Datasheets & Resources

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