EPM7128SLC84-6N vs EPM7128SLI84-10N 比較
詳細な並列比較: EPM7128SLC84-6N メーカー: Intel および EPM7128SLI84-10N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM7128SLI84-10N - MAX 7000S CPLD 128 Macro 10ns 84-PLCC | Intel / Altera
EPM7128SLI84-10N Nrnd仕様比較
| パラメータ | EPM7128SLC84-6N | EPM7128SLI84-10N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $8.75 | $8.45 |
| Family | MAX 7000S | MAX 7000S |
| Device System Gates | 2500 | — |
| Number of Macro Cells | 128 | — |
| Number of User I/Os | 68 | — |
| Number of Logic Blocks/Elements | 8 | — |
| Number of Global Clocks | 2 | — |
| Product Terms per Macro Cell | 32 | — |
| Maximum Operating Frequency | 147.1 MHz | — |
| Pin-to-Pin Delay (Speed Grade) | 6 ns | — |
| 電源電圧 | 5 V | — |
| Process Technology | CMOS, EEPROM | CMOS EEPROM |
| Program Memory Type | EEPROM | — |
| In-System Programmability | Yes (ISP via JTAG) | — |
| パッケージ | 84-pin PLCC (J-lead) | 84-pin PLCC (J-Lead) |
| 動作温度 | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (Industrial) |
| RoHS ステータス | Non-Compliant (legacy 5V part) | [DATA_NEEDED: RoHS compliance per latest Intel/Altera declaration] |
| Logic Cells / Macro Cells | — | 128 macro cells |
| Usable Gates | — | 2,500 |
| Number of Logic Elements / Blocks | — | 16 Logic Array Blocks (LABs) |
| User I/Os | — | 68 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Frequency (fMAX) | — | 125 MHz |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V (5 V typical) |
| I/O Voltage Tolerance | — | 3.3 V / 5 V MultiVolt I/O |
| Programmability | — | In-system programmable (ISP), non-volatile EEPROM |
| Boundary-Scan (JTAG) | — | IEEE Std 1149.1 compliant |
| 実装タイプ | — | Surface Mount |
| Lead-Free | — | [DATA_NEEDED: lead-free per latest Intel/Altera declaration] |