EPM7128SLC84-6N vs EPM7128SLI84-10N 비교
다음의 상세 나란히 비교: EPM7128SLC84-6N 제조: Intel 및 EPM7128SLI84-10N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EPM7128SLI84-10N - MAX 7000S CPLD 128 Macro 10ns 84-PLCC | Intel / Altera
EPM7128SLI84-10N Nrnd사양 비교
| 파라미터 | EPM7128SLC84-6N | EPM7128SLI84-10N |
|---|---|---|
| 브랜드 | Intel | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 최종 구매 | NRND |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $8.75 | $8.45 |
| Family | MAX 7000S | MAX 7000S |
| Device System Gates | 2500 | — |
| Number of Macro Cells | 128 | — |
| Number of User I/Os | 68 | — |
| Number of Logic Blocks/Elements | 8 | — |
| Number of Global Clocks | 2 | — |
| Product Terms per Macro Cell | 32 | — |
| Maximum Operating Frequency | 147.1 MHz | — |
| Pin-to-Pin Delay (Speed Grade) | 6 ns | — |
| 공급 전압 | 5 V | — |
| Process Technology | CMOS, EEPROM | CMOS EEPROM |
| Program Memory Type | EEPROM | — |
| In-System Programmability | Yes (ISP via JTAG) | — |
| 패키지 | 84-pin PLCC (J-lead) | 84-pin PLCC (J-Lead) |
| 동작 온도 | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (Industrial) |
| RoHS 상태 | Non-Compliant (legacy 5V part) | [DATA_NEEDED: RoHS compliance per latest Intel/Altera declaration] |
| Logic Cells / Macro Cells | — | 128 macro cells |
| Usable Gates | — | 2,500 |
| Number of Logic Elements / Blocks | — | 16 Logic Array Blocks (LABs) |
| User I/Os | — | 68 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Frequency (fMAX) | — | 125 MHz |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V (5 V typical) |
| I/O Voltage Tolerance | — | 3.3 V / 5 V MultiVolt I/O |
| Programmability | — | In-system programmable (ISP), non-volatile EEPROM |
| Boundary-Scan (JTAG) | — | IEEE Std 1149.1 compliant |
| 실장 유형 | — | Surface Mount |
| Lead-Free | — | [DATA_NEEDED: lead-free per latest Intel/Altera declaration] |