EPM7128SQC100-7N vs EPM7128SQC100-7 比較
詳細な並列比較: EPM7128SQC100-7N メーカー: Intel および EPM7128SQC100-7 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EPM7128SQC100-7N - MAX 7000 CPLD, 128 Macrocells, 7.5ns, 100-Pin PQFP | Intel (Altera)
EPM7128SQC100-7N ObsoleteIntel
EPM7128SQC100-7 - 128-Macro 5V CPLD, 7.5ns, 100-Pin PQFP | Altera (Intel)
EPM7128SQC100-7 Obsolete仕様比較
| パラメータ | EPM7128SQC100-7N | EPM7128SQC100-7 |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $7.10 | $10.85 |
| Family | MAX 7000S | MAX 7000S |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Program Memory Type | EEPROM | — |
| Number of Macrocells | 128 | — |
| Number of Logic Array Blocks | 8 | — |
| Number of Global Clocks | 2 | — |
| Product Terms per Macrocell | 32 | — |
| Usable Gates | 2,500 | 2,500 |
| System Gates | 5,000 (max) | — |
| Maximum User I/Os | 84 | — |
| Pin-to-Pin Delay (tPD) | 7.5 ns | — |
| Counter Speed | 175.4 MHz | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Operating Voltage (Core) | 5.0 V | — |
| I/O Standard Support | multiVolt (2.5V, 3.3V, 5.0V) | — |
| パッケージ | 100-pin PQFP (QFP-100) | 100-pin PQFP (Plastic Quad Flat Pack) |
| 動作温度 | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| RoHS ステータス | Compliant (lead-free 'N' suffix) | Non-RoHS (legacy SnPb package) |
| Process Technology | 0.30 µm CMOS EEPROM | — |
| Security Bit | Programmable (one per device) | — |
| Product Type | — | CPLD - Complex Programmable Logic Device |
| Macro Cells | — | 128 |
| User I/Os | — | 84 |
| Logic Elements / LABs | — | 4 Logic Array Blocks (LABs) |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency | — | 125 MHz |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| Technology | — | CMOS, EEPROM-based, non-volatile |
| Programming Interface | — | JTAG (IEEE Std 1149.1), in-system programmable |
| 実装タイプ | — | Surface Mount |