EPM7128SQC100-7N vs EPM7128SQC100-7 对比
详细并排对比 EPM7128SQC100-7N 出自 Intel 和 EPM7128SQC100-7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM7128SQC100-7N - MAX 7000 CPLD, 128 Macrocells, 7.5ns, 100-Pin PQFP | Intel (Altera)
EPM7128SQC100-7N ObsoleteIntel
EPM7128SQC100-7 - 128-Macro 5V CPLD, 7.5ns, 100-Pin PQFP | Altera (Intel)
EPM7128SQC100-7 Obsolete规格对比
| 参数 | EPM7128SQC100-7N | EPM7128SQC100-7 |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $7.10 | $10.85 |
| Family | MAX 7000S | MAX 7000S |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Program Memory Type | EEPROM | — |
| Number of Macrocells | 128 | — |
| Number of Logic Array Blocks | 8 | — |
| Number of Global Clocks | 2 | — |
| Product Terms per Macrocell | 32 | — |
| Usable Gates | 2,500 | 2,500 |
| System Gates | 5,000 (max) | — |
| Maximum User I/Os | 84 | — |
| Pin-to-Pin Delay (tPD) | 7.5 ns | — |
| Counter Speed | 175.4 MHz | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Operating Voltage (Core) | 5.0 V | — |
| I/O Standard Support | multiVolt (2.5V, 3.3V, 5.0V) | — |
| 封装 | 100-pin PQFP (QFP-100) | 100-pin PQFP (Plastic Quad Flat Pack) |
| 工作温度 | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| RoHS 状态 | Compliant (lead-free 'N' suffix) | Non-RoHS (legacy SnPb package) |
| Process Technology | 0.30 µm CMOS EEPROM | — |
| Security Bit | Programmable (one per device) | — |
| Product Type | — | CPLD - Complex Programmable Logic Device |
| Macro Cells | — | 128 |
| User I/Os | — | 84 |
| Logic Elements / LABs | — | 4 Logic Array Blocks (LABs) |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency | — | 125 MHz |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| Technology | — | CMOS, EEPROM-based, non-volatile |
| Programming Interface | — | JTAG (IEEE Std 1149.1), in-system programmable |
| 安装类型 | — | Surface Mount |