EPM9320RC208-20N vs EPM9320RI208-20C 比較
詳細な並列比較: EPM9320RC208-20N メーカー: Altera および EPM9320RI208-20C メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM9320RI208-20C - 320-Macrocell MAX 9000 CPLD, 5V, 208-RQFP | Intel
EPM9320RI208-20C Obsolete仕様比較
| パラメータ | EPM9320RC208-20N | EPM9320RI208-20C |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.00 | $22.10 |
| Device Family | MAX 9000 | — |
| Logic Type | Complex Programmable Logic Device (CPLD) | — |
| Usable Gates | 6,000 | 6,000 |
| Macro Cells | 320 | — |
| Logic Array Blocks | 20 | — |
| Maximum Pin-to-Pin Delay (tPD) | 20 ns | — |
| Maximum Operating Frequency | 100 MHz | — |
| 電源電圧 | 5.0 V | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | Yes (5.0 V ISP via JTAG) |
| User I/O Pins | 168 | — |
| パッケージ | 208-pin RQFP (PowerQuad II) | 208-pin RQFP (Plastic Quad Flat Pack) |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度 | [DATA_NEEDED: operating temperature range] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | — |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| Family | — | MAX 9000 |
| Device Type | — | EE PLD / CPLD |
| Logic Elements / Macrocells | — | 320 |
| Number of Flip-Flops | — | 484 |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum Internal Clock Frequency | — | 100 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 20 ns |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| I/O Voltage Tolerance | — | 3.3 V or 5.0 V |
| Programmable Interface | — | JTAG (IEEE Std. 1149.1) BST |
| Technology | — | CMOS EEPROM |
| Operating Temperature (Industrial) | — | -40C to +85C |
| Lead-Free / RoHS | — | Information not confirmed from verified data [DATA_NEEDED: RoHS status] |