EPM9320RI208-10N vs EPM9320ARI208-10N 比較
詳細な並列比較: EPM9320RI208-10N メーカー: Altera および EPM9320ARI208-10N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM9320ARI208-10N - MAX 9000 CPLD, 320 Macrocells, 208-RQFP | Altera
EPM9320ARI208-10N Obsolete仕様比較
| パラメータ | EPM9320RI208-10N | EPM9320ARI208-10N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $27.20 | $16.20 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | Complex Programmable Logic Device (CPLD) | — |
| Usable Gates | 6,000 | 6,000 |
| Macro Cells | 320 | — |
| Logic Array Blocks (LABs) | 20 | 20 |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Maximum System Clock Frequency | 100 MHz | — |
| 電源電圧 | 5 V | 4.5 V to 5.5 V |
| I/O Voltage | 5 V | — |
| User I/O Pins | 160 | — |
| パッケージ | 208-pin RQFP (PowerQuad II) | 208-pin RQFP (S-PQFP-G208) |
| 実装タイプ | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (JTAG/ISP) | — |
| 動作温度範囲 | -40C to +85C (industrial) | — |
| RoHS ステータス | Compliant (N suffix = lead-free) | unknown |
| Lead Finish | Lead-free (matte tin) | — |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 320 |
| Maximum Operating Frequency | — | 144.9 MHz |
| Propagation Delay (tPD) | — | 10 ns (speed grade -10) |
| 動作温度 | — | -40 C to +85 C (industrial) |
| Process Technology | — | CMOS EEPROM |
| Programmability | — | In-system (ISP) via IEEE 1149.1 JTAG |
| Global Dedicated Inputs | — | 16 |
| Architecture | — | Multiple Array MatriX (MAX) third-generation |