EPM9320RI208-10N vs EPM9320ARI208-10N Comparison
Detailed side-by-side comparison of EPM9320RI208-10N by Altera and EPM9320ARI208-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9320ARI208-10N - MAX 9000 CPLD, 320 Macrocells, 208-RQFP | Altera
EPM9320ARI208-10N ObsoleteSpecification Comparison
| Parameter | EPM9320RI208-10N | EPM9320ARI208-10N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | Complex Programmable Logic Device (CPLD) | — |
| Usable Gates | 6,000 | 6,000 |
| Macro Cells | 320 | — |
| Logic Array Blocks (LABs) | 20 | 20 |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Maximum System Clock Frequency | 100 MHz | — |
| Supply Voltage | 5 V | 4.5 V to 5.5 V |
| I/O Voltage | 5 V | — |
| User I/O Pins | 160 | — |
| Package | 208-pin RQFP (PowerQuad II) | 208-pin RQFP (S-PQFP-G208) |
| Mounting Type | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (JTAG/ISP) | — |
| Operating Temperature Range | -40C to +85C (industrial) | — |
| RoHS Status | Compliant (N suffix = lead-free) | unknown |
| Lead Finish | Lead-free (matte tin) | — |
| MSL Level | [DATA_NEEDED: MSL level] | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 320 |
| Maximum Operating Frequency | — | 144.9 MHz |
| Propagation Delay (tPD) | — | 10 ns (speed grade -10) |
| Operating Temperature | — | -40 C to +85 C (industrial) |
| Process Technology | — | CMOS EEPROM |
| Programmability | — | In-system (ISP) via IEEE 1149.1 JTAG |
| Global Dedicated Inputs | — | 16 |
| Architecture | — | Multiple Array MatriX (MAX) third-generation |