EPM9400LC84-15 vs EPM9320LC84-10 比較
詳細な並列比較: EPM9400LC84-15 メーカー: Altera および EPM9320LC84-10 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM9400LC84-15 | EPM9320LC84-10 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $23.10 | $84.96 |
| Family | MAX 9000 | MAX 9000 EPLD |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 8,000 | 6000 (typical) |
| Macro Cells | 400 | — |
| Logic Array Blocks | 25 | — |
| Maximum User I/Os | 59 | — |
| Maximum Operating Frequency | 117.6 MHz | — |
| Speed Grade | -15 (15 ns pin-to-pin delay) | — |
| Core Supply Voltage (VCCINT) | 5.0 V | — |
| Input Logic Compatibility | TTL, 3.3 V and 5.0 V tolerant | — |
| Configuration Memory | EEPROM (non-volatile, in-system programmable) | — |
| JTAG Interface | IEEE Std. 1149.1 compliant (ISP) | — |
| パッケージ | 84-pin PLCC | 84-pin PLCC (JEDEC MO-047) |
| 実装タイプ | Surface Mount | Surface Mount (PLCC socket also common) |
| 動作温度 | 0C to +70C (Commercial) | 0C to +70C (commercial) [DATA_NEEDED: exact grade suffix] |
| Minimum VCCINT | 4.75 V | — |
| Programming Method | In-System Programmable via JTAG | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | ROHS3 Compliant (per fpgalink listing) |
| Device | — | EPM9320 |
| Macrocells | — | 320 |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 168 (varies by package) |
| Pin-to-Pin Logic Delay (tPD) | — | 10 ns |
| Maximum Frequency (fCNT) | — | [DATA_NEEDED: fCNT in MHz] |
| Supply Voltage (VCC) | — | 5.0 V (typical, see datasheet) |
| Process Technology | — | 0.7 µm CMOS EEPROM/UV-EPROM |
| Programming Interface | — | JTAG (IEEE 1149.1) boundary-scan, Altera ByteBlaster compatible |
| Configuration | — | Non-volatile EEPROM (instant-on, no boot PROM) |
| 湿気感度レベル（MSL） | — | MSL-3, 168 hours (per fpgalink listing) |
| Manufacturer Lead Time | — | 1-7 days (per fpgalink listing) |