EPM9560RC208-15N vs EPM9560RC208-20C 比較
詳細な並列比較: EPM9560RC208-15N メーカー: Intel および EPM9560RC208-20C メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM9560RC208-15N | EPM9560RC208-20C |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $19.85 | $0.00 |
| Series | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | EEPROM-based CPLD (EE PLD) |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | — |
| User I/O | 212 (in 208-RQFP, see family datasheet) | — |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Maximum Internal Frequency | 117.6 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| Programmability | In-system via IEEE 1149.1 JTAG | — |
| Configuration Memory | CMOS EEPROM (non-volatile) | EEPROM (non-volatile) |
| パッケージ | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Power Quad Flat Pack) |
| Operating Temperature (commercial) | 0C to +70C | — |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | [DATA_NEEDED: check part marking suffix for lead-free/RoHS] | [DATA_NEEDED: RoHS status] |
| Speed Grade | -15 (15 ns tPD) | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Family | — | MAX 9000 |
| Flip-Flops | — | 772 |
| Configurable I/O Lines | — | 149 |
| Propagation Delay (tPD) | — | 20 ns (speed grade -20) |
| Maximum Frequency | — | 100 MHz |
| 電源電圧 | — | 5.0 V |
| I/O Voltage Support | — | 3.3 V or 5 V |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| JESD-30 Package Code | — | S-PQFP-G208 |
| Terminal Form | — | Gull Wing |
| Operating Temperature Grade | — | Commercial (0C to +70C) |
| Technology | — | CMOS |