EPM9560RC240-12 vs EPM9560RC240-15YY 比較
詳細な並列比較: EPM9560RC240-12 メーカー: Altera および EPM9560RC240-15YY メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM9560RC240-12 | EPM9560RC240-15YY |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.95 | $64.50 |
| Family | MAX 9000 (EPM9560) | MAX 9000A |
| Device Type | EE PLD / CPLD | — |
| Macrocells | 560 | — |
| Flip-Flops | 772 | — |
| User I/O Pins | 191 | — |
| Logic Array Blocks (LABs) | 20 | [DATA_NEEDED: LAB count for EPM9560] |
| Maximum Propagation Delay (tPD) | 13.4 ns | — |
| Speed Grade | -12 (13.4 ns tPD) | -15 |
| Maximum Operating Frequency (estimated) | ~76 MHz registered | — |
| Core Supply Voltage (VCCINT) | 5 V | — |
| I/O Logic Levels | 3.3 V or 5 V (configurable) | — |
| パッケージ | PQFP-240 (RC240) 0.500 mm pitch, gull-wing | — |
| 実装タイプ | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Process Technology | CMOS | — |
| 動作温度 | [DATA_NEEDED: operating temperature grade] | 0 C to +70 C (commercial) |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | Non-RoHS (YY suffix indicates non-compliant / matte tin or SnPb lead finish per Altera legacy convention) |
| Logic Type | — | CMOS EEPROM-based CPLD |
| Number of Macrocells | — | 560 |
| Usable Gates | — | 12,000 |
| Number of User I/O | — | 191 |
| Maximum Operating Frequency | — | 117.6 MHz |
| Propagation Delay (tpd) | — | 15 ns |
| Supply Voltage (VCC) | — | 5.0 V |
| Programmability | — | In-system via IEEE 1149.1 (JTAG) |
| Package Type | — | RQFP-240 (Plastic Quad Flat Pack) |