K3K8K80BM-JGCT vs K3LK8L80CM-MGCT 比較
詳細な並列比較: K3K8K80BM-JGCT メーカー: Samsung Electronics および K3LK8L80CM-MGCT メーカー: Samsung Electronics。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Samsung Electronics
K3K8K80BM-JGCT - Samsung LPDDR DRAM Memory IC | Samsung Electronics
K3K8K80BM-JGCT ✓ 生産中
仕様比較
| パラメータ | K3K8K80BM-JGCT | K3LK8L80CM-MGCT |
|---|---|---|
| ブランド | Samsung Electronics | Samsung Electronics |
| カテゴリ | Memory ICs | Memory ICs |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $3.10 | $0.00 |
| Manufacturer | Samsung Electronics | — |
| Product Family | K3K mobile DRAM (LPDDR) component series | — |
| メモリタイプ | Low Power DRAM (LPDDR) component | LPDDR5X SDRAM |
| Density | [DATA_NEEDED: die density in Gb] | 32 Gbit (4 GB) |
| メモリ構成 | [DATA_NEEDED: x8/x16 organization] | x32 |
| インターフェース | [DATA_NEEDED: LPDDR4X or LPDDR5] | LPDDR5X (JEDEC low-power DDR) |
| Maximum Data Rate | [DATA_NEEDED: Mbps] | — |
| Supply Voltage (VDD) | [DATA_NEEDED: core supply voltage] | — |
| Supply Voltage (VDDQ) | [DATA_NEEDED: I/O supply voltage] | — |
| Package Type | FBGA (Ball Grid Array) | — |
| Ball Count | [DATA_NEEDED: package ball count] | — |
| 実装タイプ | Surface Mount | Surface Mount (BGA) |
| 動作温度 | [DATA_NEEDED: operating temperature range] | -25C to +85C |
| Speed Grade Suffix | J (per Samsung speed-grade coding) | CM-MGCT |
| Packing Suffix | CT (per Samsung packing-code convention) | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | Compliant (per JLCPCB listing) |
| MSLレベル | [DATA_NEEDED: moisture sensitivity level] | [DATA_NEEDED: MSL level] |
| Max Data Rate | — | 7500 Mbps |
| Supply Voltages | — | 0.5 V, 900 mV, 1.05 V, 1.8 V (multi-rail) |
| パッケージ | — | FBGA-315 (315-ball) |
| Power Efficiency | — | ~25% improvement vs LPDDR5 |
| Application Class | — | Mobile, PC, automotive, on-device AI |
| Package Family | — | FBGA -> BGA -> surface mount |
| Typical End Products | — | Smartphones, tablets, edge AI devices |
| Refresh / Standby Modes | — | Self-refresh, deep power-down (per LPDDR5X protocol) |