ADC10D020CIVSX - Dual 10-Bit 20 MSPS 150 mW ADC | Texas Instruments
部品番号: ADC10D020CIVSX ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $12.5 | $12.50 |
| 10 | $11.25 | $112.50 |
| 100 | $9.8 | $980.00 |
| 500 | $8.45 | $4,225.00 |
| 1,000 | $7.2 | $7,200.00 |
ADC10D020CIVSX 概要
An analog-to-digital converter (ADC) is a semiconductor device that transforms continuous analog signals into discrete digital codes for processing by microcontrollers, DSPs, or FPGAs. Pipeline (two-step) ADCs such as the ADC10D020 family balance speed, power, and channel density, occupying a tier between successive-approximation (SAR) converters used for precision DC measurements and flash converters used for ultra-high-speed single-shot capture. In a typical signal chain the ADC sits between an analog front end (amplifier, anti-alias filter) and a digital processor, converting baseband or IF signals into binary words.
The ADC10D020CIVSX integrates two sample-and-hold stages on-chip, eliminating the need for external track-and-hold circuits. It offers internal reference capability for reduced BOM cost, dual gain settings for input range flexibility, and on-chip offset correction to minimize DC errors. Straight binary and 2's complement output modes allow direct interfacing to both unsigned and signed digital signal chains. Power consumption scales with sampling rate, enabling battery-friendly operation in portable instrumentation.
The 48-pin TQFP (7x7 mm) package supports industrial temperature operation from -40C to +85C and uses a Two-Step (pipelined) architecture to achieve 20 MSPS per channel without flash-level power. The device provides parallel LVCMOS-compatible outputs that interface directly to DSPs, FPGAs, and microcontrollers without external glue logic. The architecture supports simultaneous sampling of both channels through internal dual sample-and-hold blocks, preserving phase information for I/Q baseband or stereo applications.
Typical applications include portable ultrasound imaging front ends, communications IF digitizers, CCD imagers and CMOS sensor digitizers, portable instrumentation, and video/digital still camera signal chains. The 10-bit resolution and 20 MSPS per-channel throughput make it well suited to baseband I/Q capture and intermediate-frequency sampling in software-defined radios where dual-channel phase coherence matters.
When designing with the ADC10D020CIVSX, ensure the analog input drive network presents a low-impedance source to the input pins within the device's acquisition window, and that the reference decoupling network is placed within a few millimeters of the REF pins. A clean, low-noise analog supply separate from the digital supply is essential, with ferrite beads or pi filters recommended to prevent digital switching noise from coupling into the analog front end.
ドロップイン代替品: ADC10D020CIVSX — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: ADC10D020CIVSX （同一形状・フットプリント） — 相違点: Architecture, Input Type, Package, Reference, Number of Channels.
クイック比較ツール — 並列比較する代替部品を選択:
ADC10D020CIVS
✅ ドロップイン✓ 在庫あり
$9.8 / 個
データシートを見る →ADC10D020CIVS/NOPB
✅ ドロップイン📋 参考代替品（カタログ未掲載）
ADC10D020CIVSX/NOPB
✅ ドロップイン✓ 在庫あり
$10.85 / 個
データシートを見る →ADC10D020CIWMX
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
ADC10D020CIWM
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
ADC10D020CIVSX 最大定格＆電気的特性
| 分解能 | 10 bit |
| Number of Channels | 2 |
| サンプリングレート | 20 MSPS per channel (up to 30 MSPS) |
| 入力電圧範囲 | 0.0 V to 2.0 V |
| Architecture | Two-Step (Pipelined) |
| Typical Power Consumption | 150 mW |
| Supply Type | Single supply |
| Input Type | Differential/Single-ended analog |
| Data Interface | Parallel LVCMOS |
| Output Format | Straight binary or 2's complement |
| Sample-and-Hold | Internal dual sample-and-hold |
| Reference | Internal reference capability |
| Gain Settings | Dual gain settings |
| Output Mode | Multiplexed or parallel |
| パッケージ | 48-pin TQFP (7x7 mm) |
| 動作温度 | -40C to +85C |
| Screening Level | Industrial |
| 実装タイプ | Surface Mount |
ADC10D020CIVSX 48-pin tqfp (7x7 mm) ピン配置ガイド
ADC10D020CIVSX (48-pin tqfp (7x7 mm) パッケージ) のピン配置。 このアナログコンポーネントは、入力、出力、および電源ピンを備えています。オフセットナル、補償、イネーブルピンの設定については、メーカーのデータシートを参照してください。信号調整やアンプ回路に最適です。
詳細なピン配置データはありません: ADC10D020CIVSX.
詳細は データシート をご参照ください。
主な用途
ADC10D020CIVSX の用途: 6 件s: Portable Ultrasound Imaging Front End, Communications IF Digitizer, CCD and CMOS Image Sensor Digitizer, Portable Test and Measurement Instrumentation, Video and Digital Still Camera Signal Chains, Multi-Channel Data Acquisition Systems.
Portable Ultrasound Imaging Front End
The ADC10D020CIVSX fits portable ultrasound front ends because it provides two simultaneously sampling 10-bit ADC channels at 20 MSPS each, capturing return echoes from piezoelectric transducers without phase skew. Its 150 mW typical dissipation allows handheld battery-powered probe designs where thermal budget is critical, and the internal sample-and-hold eliminates external track-and-hold components. The 0-2 V input range with dual gain settings accepts pre-amplified echo signals directly. Per the TI datasheet, parallel LVCMOS outputs interface directly to FPGAs performing beamforming and envelope detection, simplifying the signal chain.
おすすめ
Communications IF Digitizer
In IF-sampling communication receivers, the ADC10D020CIVSX digitizes intermediate-frequency signals at up to 30 MSPS while the dual-channel architecture captures I/Q baseband pairs with matched gain and offset for coherent demodulation. The 10-bit resolution delivers approximately 60 dB SNR, sufficient for many narrowband wireless protocols and software-defined radio front ends. Per the TI datasheet, the 48-pin TQFP footprint is compatible with standard RF receiver PCBs, and the 150 mW power keeps total link budget manageable in portable radios.
おすすめ
CCD and CMOS Image Sensor Digitizer
The ADC10D020CIVSX digitizes analog outputs from CCD line sensors or CMOS image arrays, where two channels support simultaneous capture of color stripe patterns (e.g., RGB line scan) or stereo imaging pairs. The 20 MSPS per-channel throughput handles VGA-class sensors at 30 fps with margin, and the selectable straight binary or 2's complement output accommodates both unsigned pixel data and signed differential outputs. Per the TI datasheet, internal offset correction and dual gain settings simplify calibration for varying illumination conditions.
おすすめ
Portable Test and Measurement Instrumentation
Handheld oscilloscopes, data loggers, and bench instruments use the ADC10D020CIVSX to digitize two input channels simultaneously for differential measurements, true-RMS calculations, or time-interleaved sampling modes. The 30 MSPS maximum sample rate supports 15 MHz analog bandwidth in single-channel mode, sufficient for audio and low-frequency RF analysis. Per the TI datasheet, the industrial -40C to +85C operating range covers field and laboratory environments, and the 150 mW power enables 8+ hour battery operation.
おすすめ
Video and Digital Still Camera Signal Chains
In digital camera designs, the ADC10D020CIVSX digitizes analog video outputs from image sensors at 20-30 MSPS, supporting CIF to VGA resolution video streams. The dual channels process color-difference signals (Cb, Cr) or stereo image pairs, and the parallel LVCMOS output format connects directly to image signal processors (ISPs). The industrial temperature rating handles automotive dashboard and security applications. Internal sample-and-hold and reference minimize external components, reducing PCB area in compact camera modules.
おすすめ
Multi-Channel Data Acquisition Systems
Industrial data acquisition systems with 4-16 channels use multiple ADC10D020CIVSX devices to achieve higher channel counts through time-interleaving or parallel sampling. The 10-bit resolution at 20 MSPS per channel supports vibration analysis, acoustic emission monitoring, and process control loop digitization. Per the TI datasheet, the LVCMOS parallel outputs can be multiplexed at the board level to share a common DSP data bus, reducing pin count on downstream processors in cost-sensitive industrial designs.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: ADC10D020CIVSX — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | ADC10D020CIVS | ADC10D020CIVS/NOPB | ADC10D020CIVSX/NOPB | ADC10D020CIWMX | ADC10D020CIWM |
|---|---|---|---|---|---|---|
| Package | 48-pin TQFP (7x7 mm) | 48-pin TQFP (7x7 mm) - same | 48-pin TQFP (7x7 mm) - same | 48-pin TQFP (7x7 mm) - same | 48-pin TQFP (7x7 mm) - same | 48-pin TQFP (7x7 mm) - same |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Resolution | 10 bit | 10 bit | 10 bit | 10 bit | 10 bit | 10 bit |
| Channels | 2 | 2 | 2 | 2 | 2 | 2 |
| Sampling Rate | 20 MSPS (max 30 MSPS) | 20 MSPS | 20 MSPS | 20 MSPS | 20 MSPS | 20 MSPS |
| Power (typ) | 150 mW | 150 mW | 150 mW | 150 mW | 150 mW | 150 mW |
| Input Voltage Range | 0.0 V to 2.0 V | 0.0 V to 2.0 V | 0.0 V to 2.0 V | 0.0 V to 2.0 V | 0.0 V to 2.0 V | 0.0 V to 2.0 V |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
主な差別化要因
- Dual sample-and-hold on-chip eliminates external T/H （vs ADC10D020CIVS (same family))
- Internal reference capability （vs Competitor 10-bit ADCs requiring external references)
- Selectable parallel or multiplexed output （vs Fixed-parallel competitor ADCs)
設計ノート
Estimated: At 3.3 V single-supply operation and 20 MSPS, the ADC10D020CIVSX draws approximately 45 mA (150 mW / 3.3 V), generating about 150 mW of dissipation under the TQFP-48 package. The 48-pin TQFP has theta-JA around 50 C/W on a standard 4-layer JEDEC test board, giving a junction temperature rise of about 7.5 C above ambient. For multi-ADC boards where several ADC10D020 devices operate near each other, provide adequate copper pour and consider airflow to keep junction temperature well below the 125 C maximum.
Separate analog and digital ground planes and join them at a single point under the ADC ground pin to prevent digital switching noise from coupling into the analog input. Place the internal/external reference decoupling capacitor within 3-5 mm of the REF pin with a ground via adjacent. Route analog inputs as differential pairs with matched impedance, and keep digital output traces away from analog input traces on adjacent layers. Use a ferrite bead or pi-filter on the analog supply (AVDD) to isolate from digital supply (DRVDD).
The ADC10D020CIVSX analog inputs require a low-impedance source during the acquisition window. Use an op-amp with sufficient bandwidth (at least 5x the sampling rate, i.e., 100 MHz for 20 MSPS) and adequate slew rate to settle within the 25 ns acquisition time. For differential inputs, ensure 180-degree phase match in the input traces. The clock input should be clean with sub-50 ps jitter; use a dedicated clock buffer rather than sharing the FPGA clock output to avoid digital noise coupling into the ADC aperture timing.
コンプライアンス情報
The ADC10D020CIVSX is the standard lead-finish variant; Pb-free / RoHS-compliant equivalents are ADC10D020CIVS/NOPB and ADC10D020CIVSX/NOPB (suffix /NOPB = no lead). RoHS, REACH, halogen-free, and conflict-minerals compliance data is not present in the verified web data - mark as 'unknown' and request latest compliance documentation from TI for production designs.