DSPIC30F6013-20I/PF - 16-bit DSC, 132KB Flash, 80-TQFP | Microchip
部品番号: DSPIC30F6013-20I/PF ✗ 生産終了| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $14.5 | $14.50 |
| 10 | $13.2 | $132.00 |
| 100 | $11.85 | $1,185.00 |
| 500 | $10.6 | $5,300.00 |
| 1,000 | $9.4 | $9,400.00 |
DSPIC30F6013-20I/PF 概要
A Digital Signal Controller (DSC) is a hybrid architecture that merges a microcontroller's deterministic control loop with a Digital Signal Processor's multiply-accumulate (MAC) throughput. Within Microchip's taxonomy, the dsPIC30F belongs to the broader hierarchy: DSC -> MCU -> microcontroller -> embedded processor -> semiconductor. By integrating single-cycle MAC and barrel-shifter DSP instructions into a 16-bit RISC core, a DSC eliminates the need for a standalone DSP chip in motor-control, power-conversion, and audio-processing designs, reducing BOM cost, board area, and inter-IC latency.
Key features of the DSPIC30F6013-20I/PF include 4 KB of RAM for data, a 12-bit Analog-to-Digital Converter (ADC) with multiple input channels, multiple 16-bit timers, and 60 digital I/O ports supporting peripheral pin select. Communication peripherals include UART, SPI, I2C, CAN, and I2S/SPIs interfaces, enabling flexible connectivity with sensors, actuators, and human-machine interfaces. The on-chip Flash supports self-programming for in-field firmware upgrades.
The DSPIC30F6013-20I/PF operates from a single 4.5 V to 5.5 V supply, with an industrial temperature range of -40C to +85C denoted by the -20I/PF suffix (I = industrial, PF = 80-pin TQFP, lead-free). The architecture is based on a Harvard bus with separate program and data paths, allowing simultaneous instruction fetch and data access. The DSP engine supports fractional and integer arithmetic modes, with a saturation and rounding accumulator to prevent overflow in control loops.
Typical applications include 3-phase AC induction and brushless DC motor control, uninterruptible power supplies (UPS) and power factor correction (PFC) converters, automotive sensor interfacing, audio decoding and equalization, industrial automation PLC, and digital power conversion. The CAN peripheral makes the part particularly attractive for vehicle body controllers and industrial field-bus nodes.
When designing with this device, ensure that decoupling capacitors are placed close to VDD/VSS pairs, and that the analog supply rail (AVDD) is well-isolated from noisy digital switching currents. The Flash endurance rating should be checked against the in-field update frequency requirement; using the device's bootloader eliminates the need for external programming hardware.
This page synthesizes distributor pricing, drop-in alternatives from the same dsPIC30F family, and practical design notes that extend beyond what is printed in the manufacturer datasheet.
ドロップイン代替品: DSPIC30F6013-20I/PF — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: DSPIC30F6013-20I/PF （同一形状・フットプリント） — 相違点: Core Architecture, Package, ADC, Operating Temperature, Program Memory (Flash).
クイック比較ツール — 並列比較する代替部品を選択:
DSPIC30F6013-30I/PF
✅ ドロップイン✓ 在庫あり
$8.3 / 個
データシートを見る →DSPIC30F6014-20I/PF
✅ ドロップイン📋 参考代替品（カタログ未掲載）
DSPIC30F6012-30I/PF
✅ ドロップイン✓ 在庫あり
$16.95 / 個
データシートを見る →DSPIC30F6011-30I/PF
✅ ドロップイン📋 参考代替品（カタログ未掲載）
DSPIC30F6013AT-20I/PF
✅ ドロップイン📋 参考代替品（カタログ未掲載）
DSPIC30F6013-20I/PF 最大定格＆電気的特性
| Core Architecture | dsPIC30F 16-bit DSC (DSP + MCU) |
| Program Memory (Flash) | 132 KB (44K x 24 words) |
| Data RAM | 6144 bytes (2K x 24) |
| Operating MIPS | 20 MIPS |
| Internal Clock Speed | Up to 40 MHz |
| Supply Voltage (VDD) | 4.5 V to 5.5 V |
| 動作温度 | -40C to +85C (Industrial) |
| Digital I/O Pins | 60 |
| ADC | 12-bit, multi-channel |
| Timers | Multiple 16-bit |
| Communication Peripherals | UART, SPI, I2C, CAN, I2S |
| パッケージ | 80-pin TQFP (14 x 14 mm, 1 mm height, lead-free) |
| 実装タイプ | Surface Mount |
| ROM Type | Flash (self-programmable) |
| Lead-Free / RoHS | Yes (per datasheet suffix /PF) |
DSPIC30F6013-20I/PF ピン構成
| ピン 1 | AN0/AN1/AN2/... — Analog inputs / digital I/O multiplexed functions - see datasheet Table for exact pin mapping in 80-pin TQFP |
| ピン 80 | MCLR — Master Clear (reset) input, active-low |
主な用途
DSPIC30F6013-20I/PF の用途: 6 件s: 3-Phase Brushless DC Motor Control, Uninterruptible Power Supply (UPS) and PFC, Automotive CAN Body Control, Digital Audio Processing, Industrial PLC and Sensor Interfacing, Switch-Mode Power Supply Digital Control.
3-Phase Brushless DC Motor Control
The DSPIC30F6013-20I/PF is purpose-built for 3-phase BLDC and PMSM motor control because its 20 MIPS throughput executes Field-Oriented Control (FOC) loops inside the 100 us current-loop deadline with comfortable headroom. The on-chip 12-bit ADC samples two shunt currents plus DC-bus voltage synchronously to a 20 kHz PWM, while the DSP engine performs Park/Clarke transforms and PI regulators in single-cycle instructions. The 132 KB Flash holds the state-machine, observer, and speed-loop code for sensorless operation, and the CAN peripheral streams telemetry to the vehicle bus without loading the CPU.
おすすめ
Uninterruptible Power Supply (UPS) and PFC
The DSPIC30F6013-20I/PF drives digital Power Factor Correction (PFC) and UPS control loops because its DSP MAC unit completes one multiplication-accumulate per cycle, enabling average-current-mode control at 50 kHz switching frequency. The 12-bit ADC samples inductor current and input voltage simultaneously through the device's dual sample-and-hold, while the high-speed PWM module generates complementary gate-drive signals with programmable dead time. The 60 I/O pins expose status LEDs, fault relays, and RS-485 comms for inverter paralleling.
おすすめ
Automotive CAN Body Control
The DSPIC30F6013-20I/PF is widely deployed in automotive body controllers because its on-chip CAN 2.0B module handles 1 Mbit/s traffic while the DSP engine processes analog sensor inputs in real time. The 60 digital I/O pins drive lighting, mirror-fold, window, and lock actuators with PWM dimming, and the 12-bit resolution for battery-voltage measurement in the field stop-start cranking transients. Note that for AEC-Q100 automotive qualification the DSPIC30F6013AT-20I/PF variant should be selected instead of the standard -20I/PF industrial-grade part.
おすすめ
Digital Audio Processing
The DSPIC30F6013-20I/PF handles audio effects and decoding thanks to its single-cycle MAC plus the I2S peripheral that streams 16- to 32-bit audio samples at 44.1 kHz and 48 kHz. The 132 KB Flash stores parametric EQ and dynamic-range-compressor coefficients, and the 6 KB RAM buffers block-processed audio frames. The DSP engine's fractional arithmetic mode keeps headroom for limiter algorithms without overflow, making the part a cost-effective choice for pro-audio mixers and consumer soundbars.
おすすめ
Industrial PLC and Sensor Interfacing
The DSPIC30F6013-20I/PF serves as a compact PLC controller in industrial automation because its 60 I/O pins, multiple timers, and 12-bit ADC handle analog sensor conditioning plus digital logic on one chip. The UART, SPI, and I2C peripherals talk to HMIs, motor drivers, and IO-Link transceivers, and the CAN module bridges to CANopen or DeviceNet fieldbuses. The 20 MIPS throughput executes IEC 61131-3 ladder logic and PID loops for process control with deterministic latency, and the -40C to +85C industrial temperature rating tolerates factory-floor environments.
おすすめ
Switch-Mode Power Supply Digital Control
The DSPIC30F6013-20I/PF replaces analog PWM controllers in switch-mode power supplies by executing digital voltage-mode and average-current-mode control loops at 100 kHz to 500 kHz switching frequencies. Its high-resolution PWM module drives the MOSFET gate directly, while the 12-bit ADC samples output voltage and inductor current with 10 ns aperture. The 132 KB Flash stores look-up tables, soft-start profiles, and protection firmware, and the CAN/UART peripherals report telemetry to the host system.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: DSPIC30F6013-20I/PF — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | DSPIC30F6013-30I/PF | DSPIC30F6014-20I/PF | DSPIC30F6012-30I/PF | DSPIC30F6011-30I/PF | DSPIC30F6013AT-20I/PF |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 80-pin TQFP (14x14) | 80-pin TQFP (14x14) - same | 80-pin TQFP (14x14) - same | 80-pin TQFP (14x14) - same | 80-pin TQFP (14x14) - same | 80-pin TQFP (14x14) - same |
| MIPS | 20 MIPS | 30 MIPS (+50%) | 20 MIPS | 30 MIPS (+50%) | 30 MIPS (+50%) | 20 MIPS |
| Flash Program Memory | 132 KB | 132 KB | 256 KB (+94%) | 96 KB (-27%) | 64 KB (-52%) | 132 KB |
| Data RAM | 6 KB | 6 KB | 8 KB | 6 KB | 6 KB | 6 KB |
| CAN Peripheral | Yes (CAN 2.0B) | Yes | Yes | Yes | Yes | Yes |
| AEC-Q100 Automotive Qualified | No (industrial grade) | No | No | No | No | Yes (Q-grade suffix) |
| Lifecycle Status | NRND | NRND | NRND | NRND | NRND | NRND |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +125C (automotive) |
主な差別化要因
- Mid-range Flash density in the 80-pin TQFP dsPIC30F601x family （vs DSPIC30F6012-30I/PF)
- CAN 2.0B peripheral on-chip without external bridge （vs DSPIC30F4013-20I/ML)
- Direct migration path to higher-MIPS variant （vs DSPIC30F6011-30I/PF)
設計ノート
The DSPIC30F6013-20I/PF requires a single 4.5 V to 5.5 V supply on VDD/AVDD. Place a 10 uF bulk tantalum plus a 100 nF ceramic decoupling cap within 5 mm of each VDD/VSS pair. AVDD and AVSS pins should be filtered through a ferrite bead or 10 ohm resistor plus 10 uF + 100 nF network to keep digital switching noise out of the 12-bit ADC reference. Estimated: total decoupling budget assumes 6 VDD/VSS pairs around the 80-pin TQFP, so 12 capacitors total is a reasonable starting BOM.
Estimated: at the maximum internal clock of 40 MHz with all peripherals active, the DSPIC30F6013-20I/PF draws ~120 mA from a 5 V supply, dissipating about 0.6 W. The 80-pin TQFP has a theta_JA of approximately 50 C/W on a 4-layer PCB with 1 oz copper, yielding a 30 C junction rise above ambient - well within the 125 C max junction. For industrial enclosures without airflow, consider thermal vias under the exposed die-attach paddle to spread heat to the bottom copper plane.
Keep the 20 MHz crystal traces short and surrounded by a grounded guard ring to avoid radiating EMI into the analog inputs. Route the analog ADC inputs (AN0-AN15) away from PWM output traces; if they must cross, do so at 90 degrees. The MCLR reset pin requires a 10 kohm pull-up to VDD and a 100 nF cap to ground for noise immunity; leaving MCLR floating risks spurious resets in noisy motor-control environments.
Do not exceed the absolute maximum VDD of 6.5 V or risk latch-up. When migrating to the DSPIC30F6013-30I/PF for higher MIPS, verify the PLL settings - the multiplier and VCO range change between speed bins per the datasheet. The CAN peripheral requires an external transceiver chip (e.g. MCP2551) - the on-chip CAN module is logic-level only. Finally, the device is in NRND status so check Microchip's product change notifications before committing to a multi-year production run.
コンプライアンス情報
RoHS compliance confirmed by the /PF lead-free suffix in the Microchip ordering code per the datasheet (document 70117E). The -20I/PF part is industrial-grade only; choose the DSPIC30F6013AT-20I/PF variant for AEC-Q100 automotive qualification.
