DSPIC33EP128GM310T-I/PT - 70 MIPS 128KB DSC | Microchip
部品番号: DSPIC33EP128GM310T-I/PT ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $7.2 | $7.20 |
| 10 | $6.48 | $64.80 |
| 100 | $5.76 | $576.00 |
| 500 | $5.22 | $2,610.00 |
| 1,000 | $4.68 | $4,680.00 |
DSPIC33EP128GM310T-I/PT 概要
Key features include twelve Motor Control PWM (MCPWM) channels, eight input capture and eight output capture/compare channels, two quadrature encoder interfaces (QEI), four integrated operational amplifiers, a Charge Time Measurement Unit (CTMU), and a Parallel Thumb Generator (PTG) hardware sequencer. The four on-chip op-amps allow current-sense amplification directly inside the MCU, reducing bill-of-material cost in inverter designs. Thirteen timers and four DMA channels offload data movement from the CPU.
Technically, the dsPIC33EP core runs from a 3.3V supply with an industrial temperature rating of -40C to +85C (the /I suffix). DSP engine features include two 40-bit accumulators, 17-bit x 17-bit single-cycle multiply, and hardware divide support, enabling FOC (field-oriented control) motor algorithms with fast interrupt latency.
Typical applications include three-phase brushless DC and PMSM motor drives, solar inverters, digital power supplies, and industrial automation nodes. The dual QEI inputs make it especially well suited to servo positioning with incremental encoders.
Design consideration: budget the 3.3V rail decoupling carefully across the four supply pin groups, and keep PWM routing away from the analog op-amp inputs to preserve signal integrity. This page synthesizes datasheet specifications, drop-in same-family alternatives, and practical design notes not found on distributor listing pages.
ドロップイン代替品: DSPIC33EP128GM310T-I/PT — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: DSPIC33EP128GM310T-I/PT (同一形状・フットプリント) — 相違点: Package, Quadrature Encoder Interfaces, Operating Temperature, Core Architecture, Input Capture / Output Compare.
クイック比較ツール — 並列比較する代替部品を選択:
DSPIC33EP128GM310T-E/PT
✅ ドロップイン📋 参考代替品(カタログ未掲載)
DSPIC33EP256GM310T-I/PT
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$4.95 / 個
データシートを見る →DSPIC33EP64GM310T-I/PT
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品(カタログ未掲載)
DSPIC33EP256GM710T-I/PT
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$5.25 / 個
データシートを見る →DSPIC33EP128GM310T-I/PT 最大定格&電気的特性
| Core Architecture | 16-bit dsPIC33E DSC (Harvard) |
| Max CPU Speed | 70 MIPS (60 MHz max clock) |
| Program Memory (Flash) | 128 KB (43K x 24) |
| RAM | 16 KB |
| 電源電圧 | 3.3 V |
| Motor Control PWM Channels | 12 MCPWM |
| Input Capture / Output Compare | 8 IC / 8 OC |
| Quadrature Encoder Interfaces | 2 QEI |
| On-chip Op-Amps | 4 |
| CTMU | Yes (Charge Time Measurement Unit) |
| PTG | Yes (Parallel Thumb Generator hardware sequencer) |
| Timers | 13 |
| DMA Channels | 4 |
| 動作温度 | -40C to +85C (Industrial, /I) |
| パッケージ | 100-TQFP, 12x12x1 mm |
| 実装タイプ | Surface Mount |
| Packaging | Tape & Reel (T suffix) |
DSPIC33EP128GM310T-I/PT 100-tqfp, 12x12x1 mm ピン配置ガイド
DSPIC33EP128GM310T-I/PT (100-tqfp, 12x12x1 mm パッケージ) のピン配置。 このデジタルICには、GPIO、通信インターフェース (UART、SPI、I2C)、および電源ピンが含まれています。代替ピン機能と設定オプションについては、メーカーのデータシートを参照してください。組み込みシステム設計とPCBレイアウトに不可欠です。
詳細なピン配置データはありません: DSPIC33EP128GM310T-I/PT.
詳細は データシート をご参照ください。
主な用途
DSPIC33EP128GM310T-I/PT の用途: 6 件s: Three-Phase BLDC/PMSM Motor Drives, Solar String Inverters and MPPT Converters, Industrial Servo and Motion Control, Digital Power Supplies (LLC, PFC, Buck), Battery Management and Charging Systems, Embedded Industrial Sensing and Automation Nodes.
Three-Phase BLDC/PMSM Motor Drives
The DSPIC33EP128GM310T-I/PT is purpose-built for field-oriented control of brushless DC and permanent-magnet synchronous motors. Its 70 MIPS DSP core executes single-cycle 17x17 multiplies with dual 40-bit accumulators, sustaining 20 kHz current loops with margin, while 12 MCPWM channels generate complementary PWM pairs with hardware dead-time insertion for a full three-phase inverter. The two QEI modules interface directly with incremental encoders for position feedback, and the four on-chip op-amps amplify low-side shunt currents without external amplifiers, cutting BOM cost. Designers should place the op-amp inputs adjacent to shunt resistors and use the PTG sequencer to automate ADC sampling synchronized to PWM centers for minimal ripple in current measurements.
おすすめ
Solar String Inverters and MPPT Converters
In grid-tied solar micro-inverters and string-inverter DC-DC stages, the DSPIC33EP128GM310T-I/PT supplies both the control bandwidth and the analog integration needed for MPPT and grid-current shaping. The 12 MCPWM channels drive interleaved boost and full-bridge stages with phase-shifted carriers, and the DSP engine performs the multiply-heavy MPPT and PLL algorithms at 70 MIPS. The CTMU supports precise sensing tasks and the four op-amps buffer voltage/current feedback signals on-chip. With 128KB Flash there is ample room for grid-standard compliance code and a bootloader. Place analog feedback traces away from PWM switching nodes and synchronize ADC sampling to PWM troughs to reject switching noise in current loops.
おすすめ
Industrial Servo and Motion Control
For servo axes in factory automation, the dual QEI modules of the DSPIC33EP128GM310T-I/PT accept two independent incremental encoder inputs, enabling single-chip control of dual-axis or master/slave motion systems. The 8 input-capture channels timestamp encoder index and hall events in hardware, offloading the CPU, while 13 timers and 4 DMA channels keep trajectory calculations deterministic. The 16KB RAM holds position profiles and filter states, and the PTG hardware sequencer automates repetitive sampling sequences without CPU intervention. Industrial deployments use the -40C to +85C /I rating; for sealed drives near motors, the /E extended-temperature variant (same footprint) provides +125C capability without PCB change.
おすすめ
Digital Power Supplies (LLC, PFC, Buck)
The DSPIC33EP128GM310T-I/PT implements voltage-mode and current-mode control for LLC resonant converters, PFC stages, and high-current bucks. Adaptive dead-time control on the MCPWM peripheral maximizes efficiency in resonant topologies, and phase-shifted PWM outputs support interleaved PFC with current sharing. The 70 MIPS core closes voltage loops at tens of kHz with 3P3Z or PID compensators, and the on-chip op-amps handle average-current-mode sensing. Firmware protection - cycle-by-cycle current limit and fault shutdown - is enforced in hardware via PWM fault inputs. Keep the analog ground plane split from power ground under the controller and route feedback through a star connection at the IC ground pin.
おすすめ
Battery Management and Charging Systems
In BMS masters and smart chargers, the DSPIC33EP128GM310T-I/PT combines the CTMU charge-time measurement unit for precise sensing tasks with the on-chip op-amps for current-loop feedback in CC/CV charging profiles. The 12 MCPWM channels drive multi-phase charging bridges, and the 3.3V industrial-rated device monitors cell-string voltage through the ADC channel set. Its 128KB Flash stores state-of-charge algorithms, fault logs, and a field-updatable bootloader, while UART/SPI communication links the BMS to vehicle or inverter controllers. For outdoor and under-hood environments, specify the /E temperature variant. Ensure the CTMU calibration routine from the Microchip datasheet runs at startup to meet measurement accuracy targets.
おすすめ
Embedded Industrial Sensing and Automation Nodes
As a general automation node, the DSPIC33EP128GM310T-I/PT merges signal conditioning and control in one chip: the four op-amps amplify sensor outputs (pressure bridges, pH probes, thermistor dividers), the CTMU measures capacitance for touch or liquid-level sensing, and the PTG hardware sequencer automates sample-and-decide-report cycles with minimal CPU load. Eight input captures timestamp flowmeter and event pulses, and remappable peripheral pin selection adapts the 85 I/O to arbitrary wiring conventions. Remapped UART/SPI/I2C links connect to SCADA gateways. This integration removes an external analog front-end stage, cutting board area and drift sources in distributed I/O modules deployed at -40C to +85C.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: DSPIC33EP128GM310T-I/PT — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | DSPIC33EP128GM310T-E/PT | DSPIC33EP256GM310T-I/PT | DSPIC33EP64GM310T-I/PT | DSPIC33EP256GM710T-I/PT |
|---|---|---|---|---|---|
| Package | 100-TQFP (12x12 mm) | 100-TQFP - same | 100-TQFP - same | 100-TQFP - same | 100-TQFP - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| CPU Performance | 70 MIPS (16-bit) | 70 MIPS | 70 MIPS | 70 MIPS | 70 MIPS |
| Flash Memory | 128 KB (43K x 24) | 128 KB | 256 KB | 64 KB | 256 KB |
| Motor Control Peripherals | 12 MCPWM, 8 IC/8 OC, 2 QEI, 4 op-amps | Identical (same die) | Identical | Identical | Reduced - GM7 lacks full GM3 motor-control set |
| Operating Temperature | -40C to +85C (I) | -40C to +125C (E) | -40C to +85C | -40C to +85C | -40C to +85C |
| Packaging | Tape & Reel (T) | Tape & Reel | Tape & Reel | Tape & Reel | Tape & Reel |
主な差別化要因
- Integrated analog front-end (vs DSPIC33EP256GM710T-I/PT)
- Extended-temperature drop-in option (vs DSPIC33EP128GM310T-E/PT)
- Flash-size scalable single footprint (vs DSPIC33EP64GM310T-I/PT / DSPIC33EP256GM310T-I/PT)
設計ノート
Supply the DSPIC33EP128GM310T-I/PT from a clean 3.3V rail within the datasheet tolerance; place 0.1uF ceramic decoupling at each of the VDD/VSS pin pairs on the 100-TQFP plus one bulk 10uF capacitor near the corner supply pins. Separate the VDDCORE/VCAP requirements: the dsPIC33EP family requires an external low-ESR capacitor on the internal regulator output pin - check the datasheet pin table for the exact VCAP pin and use the recommended value, typically a 10uF low-ESR part, as omitting or undersizing it is a common cause of erratic startup.
The four on-chip op-amps and CTMU are only as accurate as their PCB environment. Route op-amp input traces short and guarded, keep them on an unbroken analog ground region, and never run MCPPWM outputs or gate-driver traces in parallel with analog feedback lines. For the dual QEI encoder inputs, use differential receivers if the encoder cable exceeds roughly 30 cm, and add series termination to control ringing at high count rates. Synchronize ADC sampling to PWM center or trough via the PTG or trigger chain to reject switching ripple in current loops.
Three frequent mistakes on dsPIC33EP designs: (1) Peripheral Pin Select (PPS) must be configured before peripherals using remappable pins function - a firmware that assumes fixed pinout will show dead UART or PWM pins; (2) the /T tape-and-reel part needs MSL-compliant reflow per the label rating - exceeding floor-life causes package moisture damage; (3) the /I rating tops out at +85C junction conditions per Microchip thermal data - if your enclosure runs hot near motor drives, migrate to the pin-identical DSPIC33EP128GM310T-E/PT rather than risking the temperature budget.
コンプライアンス情報
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