DSPIC33EP64GS506-E/PT - 16-bit DSC, 64KB, Digital Power | Microchip
部品番号: DSPIC33EP64GS506-E/PT ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $6.12 | $6.12 |
| 10 | $5.55 | $55.50 |
| 100 | $4.98 | $498.00 |
| 500 | $4.55 | $2,275.00 |
| 1,000 | $4.15 | $4,150.00 |
DSPIC33EP64GS506-E/PT 概要
A digital signal controller is a hybrid of a microcontroller (MCU) and a digital signal processor (DSP), combining MCU peripherals and ease of use with DSP math capabilities such as a hardware multiply-accumulate unit and barrel shifter. Within the power-management hierarchy, the dsPIC33EP GS50x family sits at the control layer of digital power systems, replacing analog control loops with firmware-executed feedback loops.
Key features include a 16-bit modified Harvard architecture core, dual-partition Flash with Live Update supporting programming while operating, interconnected high-speed PWM modules with complementary outputs and dead-time control, high-speed 12-bit ADCs with programmable gain amplifiers (PGA), analog comparators, and a 3.3V operating supply from 3.0V to 3.6V. The -E temperature variant is specified from -40C to +125C, running at up to 60 MIPS over that full extended range.
Architecturally, the interconnected PWM, ADC and comparator subsystems allow sub-microcycle latency between current sensing and PWM adjustment, which is essential for multi-loop digital SMPS control. The DSP engine provides single-cycle MAC and 40-bit accumulators for PI and PID control-law computation.
Typical applications include interleaved power factor correction (PFC), DC-DC converters, AC-DC power supplies, LED drivers, and solar micro-inverters.
Design consideration: select the 70 MIPS grade only for the -40C to +85C industrial range; above +85C the device must be derated to 60 MIPS.
This page adds value beyond the datasheet by consolidating drop-in alternatives, pricing tiers, and practical design notes in one place.
ドロップイン代替品: DSPIC33EP64GS506-E/PT — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: DSPIC33EP64GS506-E/PT （同一形状・フットプリント） — 相違点: Package, Core Architecture, DSP Features, Packaging, Qualification.
クイック比較ツール — 並列比較する代替部品を選択:
DSPIC33EP64GS506-I/PT
✅ ドロップイン📋 参考代替品（カタログ未掲載）
DSPIC33EP64GS506T-I/PT
✅ ドロップイン✓ 在庫あり
$9.8 / 個
データシートを見る →DSPIC33EP64GS504-I/PT
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$3.35 / 個
データシートを見る →DSPIC33EP64GS502-I/PT
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
DSPIC33EP32GS506-I/PT
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
DSPIC33EP64GS506-E/PT 最大定格＆電気的特性
| Core Architecture | 16-bit dsPIC33EP modified Harvard |
| Program Memory | 64KB (64K x 8) Flash |
| Max CPU Speed | 70 MIPS (-40C to +85C); 60 MIPS (-40C to +125C) |
| 電源電圧 | 3.0 V to 3.6 V |
| パッケージ | 64-TQFP (10x10 mm), 0.5 mm pitch |
| 動作温度 | -40C to +125C (E grade) |
| Product Family | dsPIC33EP GS50x digital power DSC |
| Dual Partition Flash | Yes, with Live Update support |
| High-Speed PWM | Interconnected, complementary outputs, dead-time control |
| ADC | High-speed 12-bit with programmable gain amplifier (PGA) |
| Analog Comparators | On-chip, interconnected to PWM |
| DSP Features | Single-cycle MAC, barrel shifter, 40-bit accumulators |
| 実装タイプ | Surface Mount |
| Qualification | Functional Safety (FuSa) capable family |
| In-Circuit Debug | Boundary scan / 2-wire programming (ICSP) |
| Low Power Modes | Yes (Idle, Sleep) |
| RoHS ステータス | Compliant |
DSPIC33EP64GS506-E/PT ピン構成
| ピン 1 | MCLR — Master clear reset, programming voltage input |
| ピン 2 | AN0/VREF+/CN2/RB0 — Analog input 0 / positive voltage reference / port B pin 0 |
| ピン 3 | AN1/VREF-/CN3/RB1 — Analog input 1 / negative voltage reference / port B pin 1 |
| ピン 4 | AN2/SS1/CN4/RB2 — Analog input 2 / SPI slave select 1 / port B pin 2 |
| ピン 5 | AN3/INDX/CN5/RB3 — Analog input 3 / QEA index input / port B pin 3 |
| ピン 6 | AN4/QEA/IC7/CN6/RB4 — Analog input 4 / QEA encoder input / input capture 7 / port B pin 4 |
| ピン 7 | AN5/QEB/IC8/CN7/RB5 — Analog input 5 / QEB encoder input / input capture 8 / port B pin 5 |
| ピン 8 | VSS — Ground reference |
| ピン 9 | OSC1/CLKI/CN30/RC12 — Oscillator crystal input / external clock input / port C pin 12 |
| ピン 10 | OSC2/CLKO/CN29/RC15 — Oscillator crystal output / clock output / port C pin 15 |
| ピン 11 | PWM1H1/RE0 — PWM channel 1 high output / port E pin 0 |
| ピン 12 | PWM1L1/RE1 — PWM channel 1 low output / port E pin 1 |
| ピン 13 | PWM1H2/RE2 — PWM channel 2 high output / port E pin 2 |
| ピン 14 | PWM1L2/RE3 — PWM channel 2 low output / port E pin 3 |
| ピン 15 | PWM1H3/RE4 — PWM channel 3 high output / port E pin 4 |
| ピン 16 | PWM1L3/RE5 — PWM channel 3 low output / port E pin 5 |
| ピン 17 | VDD — Power supply (3.0V to 3.6V) |
| ピン 18 | VSS — Ground reference |
| ピン 19 | PWM1H4/RE6 — PWM channel 4 high output / port E pin 6 |
| ピン 20 | PWM1L4/RE7 — PWM channel 4 low output / port E pin 7 |
| ピン 21 | PWM2H1/RD0 — PWM channel 2 block 1 high output / port D pin 0 |
| ピン 22 | PWM2L1/RD1 — PWM channel 2 block 1 low output / port D pin 1 |
| ピン 23 | PWM2H2/RD2 — PWM channel 2 block 2 high output / port D pin 2 |
| ピン 24 | PWM2L2/RD3 — PWM channel 2 block 2 low output / port D pin 3 |
| ピン 25 | PWM2H3/RD4 — PWM channel 2 block 3 high output / port D pin 4 |
| ピン 26 | PWM2L3/RD5 — PWM channel 2 block 3 low output / port D pin 5 |
| ピン 27 | SOSCI/CN1/RC13 — Secondary oscillator input / port C pin 13 |
| ピン 28 | SOSCO/T1CK/CN0/RA4 — Secondary oscillator output / Timer1 clock / port A pin 4 |
| ピン 29 | VDD — Power supply |
| ピン 30 | VSS — Ground reference |
| ピン 31 | SDA1/RG3 — I2C data 1 / port G pin 3 |
| ピン 32 | SCL1/RG2 — I2C clock 1 / port G pin 2 |
| ピン 33 | RTCC/RB6/IC3 — RTCC alarm / port B pin 6 / input capture 3 |
| ピン 34 | RB7/IC4 — Port B pin 7 / input capture 4 |
| ピン 35 | FLT1/RB14 — PWM fault input 1 / port B pin 14 |
| ピン 36 | FLT2/RB15 — PWM fault input 2 / port B pin 15 |
| ピン 37 | RA14 — Port A pin 14 |
| ピン 38 | RA15 — Port A pin 15 |
| ピン 39 | SDA2/RG3B/U1TX — I2C data 2 / UART1 transmit (remappable) |
| ピン 40 | SCL2/RG2B/U1RX — I2C clock 2 / UART1 receive (remappable) |
| ピン 41 | TMS/RA6 — JTAG test mode select / port A pin 6 |
| ピン 42 | TCK/RA7 — JTAG test clock / port A pin 7 |
| ピン 43 | SDI1/RP20/RF2 — SPI data in 1 / remappable pin 20 / port F pin 2 |
| ピン 44 | SDO1/RP19/RF3 — SPI data out 1 / remappable pin 19 / port F pin 3 |
| ピン 45 | SCK1/RP18/RF6 — SPI clock 1 / remappable pin 18 / port F pin 6 |
| ピン 46 | SS1/RP17/RF7 — SPI slave select 1 / remappable pin 17 / port F pin 7 |
| ピン 47 | AN6/OC9/RB8 — Analog input 6 / output compare 9 / port B pin 8 |
| ピン 48 | AN7/OC10/RB9 — Analog input 7 / output compare 10 / port B pin 9 |
| ピン 49 | VDD — Power supply |
| ピン 50 | VSS — Ground reference |
| ピン 51 | AN8/RB10 — Analog input 8 / port B pin 10 |
| ピン 52 | AN9/RB11 — Analog input 9 / port B pin 11 |
| ピン 53 | AN10/RB12 — Analog input 10 / port B pin 12 |
| ピン 54 | AN11/RB13 — Analog input 11 / port B pin 13 |
| ピン 55 | AN12/OC1/RD0 — Analog input 12 / output compare 1 / port D pin 0 |
| ピン 56 | AN13/OC2/RD1 — Analog input 13 / output compare 2 / port D pin 1 |
| ピン 57 | AN14/OC3/RD2 — Analog input 14 / output compare 3 / port D pin 2 |
| ピン 58 | AN15/OC4/RD3 — Analog input 15 / output compare 4 / port D pin 3 |
| ピン 59 | VCAP/VDDCORE — Core voltage regulator capacitor connection |
| ピン 60 | AVDD — Analog power supply |
| ピン 61 | AVSS — Analog ground |
| ピン 62 | TDO/RF8 — JTAG test data out / port F pin 8 |
| ピン 63 | TDI/RF2B — JTAG test data in / port F pin |
| ピン 64 | PGD/EMUD1/RP46 — In-circuit debug data / emulator channel 1 / remappable pin 46 |
主な用途
DSPIC33EP64GS506-E/PT の用途: 6 件s: Interleaved Power Factor Correction, DC-DC Converter Control, AC-DC Server and Telecom Power Supplies, Digital LED Driver Lighting, Solar Micro-Inverters and Power Optimizers, Industrial Motor Drives and Power Conversion.
Interleaved Power Factor Correction
The DSPIC33EP64GS506-E/PT is a natural fit for interleaved PFC because its interconnected high-speed PWM modules can drive multiple phase legs with precise phase-shift, while the 12-bit high-speed ADC samples inductor currents at the switching frequency. Microchip's own Interleaved PFC reference design for this family operates from a universal input range and produces a single high-voltage DC output of up to 350W. Current-loop bandwidths in the tens of kHz are achievable because the ADC-to-PWM interconnect removes software latency from the inner current loop, while the 16-bit DSP core runs the outer voltage loop with single-cycle MAC operations. At 60-70 MIPS the controller executes both loops plus housekeeping with margin.
おすすめ
DC-DC Converter Control
For digitally controlled buck, boost, half-bridge and LLC converters, the GS506 provides complementary PWM outputs with hardware dead-time insertion, fault-latching outputs, and cycle-by-cycle current limiting via on-chip comparators that feed directly into the PWM module. The 12-bit high-speed ADC with programmable gain amplifier (PGA) lets you connect low-amplitude shunt or current-transformer signals directly without an external amplifier stage. Control-loop update rates in the 100 kHz-plus range are supported by the interconnected analog fabric, and the dual-partition 64KB Flash allows firmware updates without dropping the power output. The 3.0V to 3.6V supply simplifies the controller bias rail derived from an auxiliary winding or small LDO.
おすすめ
AC-DC Server and Telecom Power Supplies
Server and telecom rectifiers combine PFC, LLC, telemetry and fault management, and the DSPIC33EP64GS506-E/PT handles all of these in one device: high-speed PWM for both power stages, comparator-based overcurrent protection with sub-microsecond response, and 64KB of code space sufficient for PMBus-style communication stacks. The -E grade's -40C to +125C qualification covers the hot spots near power magnetics where airflow is worst. Dual-partition Live Update is particularly valuable here, since field firmware upgrades in rack installations must not interrupt output power. The 16-bit DSP engine implements the multi-loop voltage/current/balancing control laws with single-cycle multiply-accumulate instructions.
おすすめ
Digital LED Driver Lighting
High-power LED drivers for industrial and outdoor lighting use constant-current control loops that benefit directly from the GS506's architecture. The interconnected PWM and comparator subsystem implements average-current-mode dimming with cycle-by-cycle current limit, while the high-speed ADC enables precise current regulation and open/short LED-string fault detection. The 64-TQFP's rich I/O count supports multi-string designs with per-string PWM dimming channels. The -40C to +125C E-grade qualification suits sealed luminaire enclosures where ambient temperatures near the driver board routinely exceed +85C. Firmware-based control also enables adaptive dimming curves and DALI-style digital dimming interfaces without additional ICs.
おすすめ
Solar Micro-Inverters and Power Optimizers
Micro-inverter control demands simultaneous MPPT algorithms, grid-synchronized current injection, and anti-islanding protection, all of which map well onto the DSPIC33EP64GS506's resource set. The 70 MIPS core executes MPPT perturb-and-observe or incremental-conductance algorithms with single-cycle MAC operations, while the 12-bit ADC samples panel voltage/current and grid voltage/current synchronously with the PWM carriers. On-chip comparators provide fast hardware overcurrent and overvoltage trip points required for grid interconnection safety. The dual-partition 64KB Flash supports field updates of grid-code firmware as regional regulations evolve, a real lifecycle advantage in distributed solar fleets.
おすすめ
Industrial Motor Drives and Power Conversion
Low-power industrial drives and solid-state power conversion benefit from the GS506's complementary PWM channels with dead-time control for three-phase inverter bridges, plus the ADC/PGA front-end for phase-current sensing via shunts. The DSP engine executes field-oriented control (FOC) math with 40-bit accumulators, keeping current-loop sample rates high even with housekeeping tasks running. The -E grade temperature range tolerates drive enclosure environments without forced cooling assumptions. Boundary-scan support simplifies production test of densely packed power boards, and the 64-pin TQFP provides enough I/O for encoder interfaces, protection inputs, and industrial communication transceivers such as CAN via available peripherals.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: DSPIC33EP64GS506-E/PT — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | DSPIC33EP64GS506-I/PT | DSPIC33EP64GS506T-I/PT | DSPIC33EP64GS504-I/PT | DSPIC33EP64GS502-I/PT | DSPIC33EP32GS506-I/PT |
|---|---|---|---|---|---|---|
| Package | 64-TQFP (10x10 mm) | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Program Memory (Flash) | 64KB | 64KB | 64KB | 32KB | 16KB | 32KB |
| Max CPU Speed | 70 MIPS (60 MIPS above +85C) | 70 MIPS (-40C to +85C range) | 70 MIPS (-40C to +85C range) | 70 MIPS | 70 MIPS | 70 MIPS |
| Operating Temperature | -40C to +125C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
| Supply Voltage | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V |
| Digital Power Peripherals (PWM/ADC/PGA) | Interconnected high-speed PWM, 12-bit ADC with PGA, comparators | Same peripheral set | Same peripheral set | Same peripheral set | Same peripheral set | Same peripheral set |
主な差別化要因
- Extended temperature qualification to +125C （vs DSPIC33EP64GS506-I/PT)
- Dual-partition Flash with Live Update （vs DSPIC33EP64GS504-I/PT)
- Interconnected digital power analog fabric （vs DSPIC33EP64GP503-I/TL)
設計ノート
Decouple the 3.0V-3.6V supply with at least one 0.1uF ceramic capacitor placed within 5 mm of each VDD/VSS pair (pins 8/17, 18/29, 30/49, 50), plus a 10uF bulk capacitor near the device. The VCAP pin (pin 59) requires the exact capacitor value specified in the Microchip datasheet for the on-chip 1.8V core regulator - typically a low-ESR ceramic - and omitting it or using a wrong value is one of the most common causes of erratic reset behavior on dsPIC33EP devices. Keep AVDD (pin 60) filtered through an RC or ferrite from VDD to preserve ADC accuracy in SMPS current-sense loops.
On the 64-TQFP 10x10 mm footprint, route the interconnected PWM outputs (pins 11-16, 19-26) away from the ADC input traces (AN0-AN15 on port B) to prevent switching-noise coupling into current-sense samples. Use a solid ground plane and connect AVSS (pin 61) to it at a single quiet point near the analog section. The 0.5 mm lead pitch requires care in stencil design; a 1:1 aperture with ~100-120 um paste reduction reduces bridging risk in lead-free reflow. Follow the Microchip layout recommendations in the family datasheet PCB layout section for ground reference of analog pins.
Two frequent mistakes with this part: (1) running at 70 MIPS above +85C - the datasheet derates the device to 60 MIPS over the extended range, so verify your actual worst-case ambient and clock configuration before locking the oscillator setup; (2) assuming dual-partition Live Update exists on all GS50x devices - per the datasheet it applies to the 64-Kbyte devices only, so designs planned around Live Update must use the 64GS506 memory class. Also confirm that the -E grade you order is genuinely the extended-temperature suffix; the -I grade looks identical but is limited to +85C.
コンプライアンス情報
RoHS compliant and lead-free per Microchip product page and distributor listings (matte-tin /PT TQFP package). REACH, halogen-free and conflict-minerals declarations should be confirmed from Microchip's official quality portal certificates.
