DSPIC33FJ06GS102-I/SP - 16-bit DSC 40MIPS 28-PDIP | Microchip
部品番号: DSPIC33FJ06GS102-I/SP ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $2.42 | $2.42 |
| 10 | $2.2 | $22.00 |
| 100 | $1.95 | $195.00 |
| 500 | $1.75 | $875.00 |
| 1,000 | $1.6 | $1,600.00 |
DSPIC33FJ06GS102-I/SP 概要
A digital signal controller combines the deterministic behavior of a microcontroller with the math capability of a DSP core. In the system hierarchy, a DSC sits between a general-purpose MCU (such as a PIC16 or PIC18) and a dedicated DSP: it executes C code and handles peripherals like a microcontroller, but adds a DSP engine, barrel shifter, and high-speed PWM modules purpose-built for closed-loop power conversion.
Key features of this device include 16-bit MCU and DSP instruction classes, an operating supply range of 3.0V to 3.6V (3.3V nominal), industrial temperature qualification (the -I suffix), and a 28-pin through-hole SPDIP package that simplifies prototyping and low-volume assembly. Peripheral support targets digital power: high-speed PWM, ADC inputs, comparators, and general-purpose I/O, per the dsPIC33FJ06GS101/X02 family datasheet.
Architecturally, the dsPIC33F core uses a modified Harvard bus with W0-W15 working registers, W15 serving as the software stack pointer, and a barrel shifter for fast bit manipulation. Microchip documents the family in the dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04 data sheet (DS-75018B series), and programming is supported via the PGEC1/PGED1 pair using tools such as PICkit and ICD programmers.
Typical applications are AC-to-DC converters, DC-to-DC converters, power factor correction (PFC) stages, and uninterruptible power supplies, where multi-loop SMPS control requires deterministic interrupt latency and precise PWM edges. The 40 MIPS core headroom supports multiple proportional-integral control loops running at tens of kilohertz.
When designing with this device, connect all VDD and VSS pins and place the decoupling network close to the supply pins; note that the PGEC3/PGED3 pair does not function on this device for in-circuit programming.
This page synthesizes distributor pricing, drop-in alternatives from the same Microchip family, and practical design notes not found in the manufacturer datasheet.
ドロップイン代替品: DSPIC33FJ06GS102-I/SP — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: DSPIC33FJ06GS102-I/SP （同一形状・フットプリント） — 相違点: Package, Mounting Type, Operating Temperature, Analog Comparators, Core Architecture.
クイック比較ツール — 並列比較する代替部品を選択:
DSPIC33FJ06GS102A-I/SP
✅ ドロップイン✓ 在庫あり
$3.6 / 個
データシートを見る →DSPIC33FJ06GS102-50I/SP
✅ ドロップイン📋 参考代替品（カタログ未掲載）
DSPIC33FJ06GS102-H/SP
✅ ドロップイン📋 参考代替品（カタログ未掲載）
DSPIC33FJ06GS101AT-I/SO
✅ ドロップイン✓ 在庫あり
$3.95 / 個
データシートを見る →DSPIC33FJ06GS101-E/P
✅ ドロップイン✓ 在庫あり
$3.05 / 個
データシートを見る →DSPIC33FJ06GS102-I/SP 最大定格＆電気的特性
| Core Architecture | 16-bit MCU/DSP core (dsPIC33F) |
| Maximum Performance | 40 MIPS |
| Flash Program Memory | 6KB (6K x 8) |
| RAM | 256B |
| Supply Voltage Range | 3.0 V to 3.6 V (3.3 V nominal) |
| 動作温度 | -40C to +85C (industrial) |
| パッケージ | 28-pin SPDIP (SP) |
| 実装タイプ | Through-Hole |
| Technology | CMOS |
| DSP Features | DSP engine, barrel shifter, MCU and DSP instruction classes |
| Key Peripherals | High-Speed PWM, ADC, comparators |
| In-Circuit Programming | PGEC/PGED (PGEC3/PGED3 pair not supported on this device) |
| Application Focus | Digital switch-mode power supplies (SMPS), PFC, AC/DC and DC/DC conversion |
| Low-Power Modes | Supported |
| Boundary Scan | Supported |
| Compiler Support | MPLAB XC-DSC C/C++ Compiler |
DSPIC33FJ06GS102-I/SP 28-pin spdip (sp) ピン配置ガイド
DSPIC33FJ06GS102-I/SP (28-pin spdip (sp) パッケージ) のピン配置。 このデジタルICには、GPIO、通信インターフェース (UART、SPI、I2C)、および電源ピンが含まれています。代替ピン機能と設定オプションについては、メーカーのデータシートを参照してください。組み込みシステム設計とPCBレイアウトに不可欠です。
詳細なピン配置データはありません: DSPIC33FJ06GS102-I/SP.
詳細は データシート をご参照ください。
主な用途
DSPIC33FJ06GS102-I/SP の用途: 6 件s: AC-to-DC Converter Control, DC-to-DC Converter Control, Power Factor Correction (PFC), Uninterruptible Power Supplies (UPS), LED Driver and Lighting Power Control, Embedded Prototyping and Education.
AC-to-DC Converter Control
The DSPIC33FJ06GS102-I/SP fits offline AC-to-DC converter control because Microchip specifically equips the GS family with high-speed PWM, ADC, and comparators for multi-loop digital power. Running at 40 MIPS, the 16-bit core closes the inner current loop and outer voltage loop with deterministic interrupt latency, while the DSP engine accelerates the proportional-integral math per switching cycle. Typical topologies include flyback and forward converters at tens to hundreds of kilohertz. A benefit of the digital approach is adaptive compensation: firmware can adjust loop gains across load ranges without hardware changes, improving hold-up time and transient response versus fixed analog control.
おすすめ
DC-to-DC Converter Control
For isolated and non-isolated DC-to-DC bricks, the DSPIC33FJ06GS102-I/SP provides the high-speed PWM resolution needed for constant on-time or peak-current-mode control at 40 MIPS core speed. The on-chip ADC samples the feedback divider and current shunt each switching period, and the comparator peripherals can implement fast cycle-by-cycle current limiting in hardware, independent of software latency. Because the device integrates these functions, an external analog controller and its compensation network are eliminated, cutting BOM cost. The 3.0V to 3.6V supply suits a bias rail derived from an auxiliary converter winding with a small LDO.
おすすめ
Power Factor Correction (PFC)
In boost-type PFC front ends, the DSPIC33FJ06GS102-I/SP executes the average-current-mode inner loop and voltage outer loop in firmware at up to 40 MIPS, meeting the per-cycle computation budget of 65-100 kHz switching stages. The ADC synchronizes to the PWM period to sample inductor current away from switching noise, and the comparators provide hardware overcurrent protection with microsecond response. Microchip lists PFC explicitly among the target applications of this family. Firmware flexibility enables valley-detection, feedforward of rectified line voltage, and adaptive dead-time, yielding power factors above 0.99 in well-tuned designs.
おすすめ
Uninterruptible Power Supplies (UPS)
Microchip names uninterruptible power supplies as a target application for the dsPIC33FJ06GS102 family. A UPS controller must juggle battery charging, inverter output regulation, and transfer switching; the 40 MIPS dsPIC33F core with DSP instructions computes sinusoidal reference generation and multi-loop regulation deterministically. The high-speed PWM generates the inverter bridge drive with adjustable dead-time, while the ADC tracks battery voltage, current, and output waveform in each control interval. Using one DSC for charger and inverter control reduces component count versus discrete analog control, and firmware enables self-test and grid-quality monitoring features.
おすすめ
LED Driver and Lighting Power Control
Constant-current LED drivers benefit from the DSPIC33FJ06GS102-I/SP's PWM plus ADC plus comparator combination: the firmware closes a current loop per switching cycle while the PWM module performs dimming at the desired resolution. At 40 MIPS the controller supports buck, boost, or buck-boost LED topologies with cycle-by-cycle current limiting handled by the analog comparators for fault safety. Digital control also enables temperature-derating curves read from an ADC channel, protecting LEDs from overheating. The 28-pin SPDIP package supports rapid prototyping of driver evaluation boards before moving to higher-volume SMT variants in the same GS family.
おすすめ
Embedded Prototyping and Education
The 28-pin SPDIP through-hole package makes the DSPIC33FJ06GS102-I/SP exceptionally friendly for breadboarding, lab kits, and university digital-power courses where soldering a QFN is impractical. Students gain exposure to a genuine 16-bit DSP core with barrel shifter and DSP instruction classes, in-circuit programming via PGEC/PGED, and the MPLAB XC-DSC compiler toolchain. The 6KB Flash is large enough for a compensator, PWM driver, and serial telemetry. Note that all VDD/VSS pins must be connected and the PGEC3/PGED3 pair is not functional on this device, a common first-week lab pitfall documented in community programming notes.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: DSPIC33FJ06GS102-I/SP — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | DSPIC33FJ06GS102A-I/SP | DSPIC33FJ06GS102-50I/SP | DSPIC33FJ06GS102-H/SP | DSPIC33FJ06GS101-E/P |
|---|---|---|---|---|---|
| Package | 28-pin SPDIP (SP) | 28-pin SPDIP (SP) - same | 28-pin SPDIP (SP) - same | 28-pin PDIP (R-PDIP-T28) - same footprint | 28-pin PDIP (P) - same footprint |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Core Performance | 16-bit dsPIC33F, 40 MIPS | 16-bit dsPIC33F, 40 MIPS | 16-bit dsPIC33F, 50 MHz-class | 16-bit dsPIC33F, 50 MHz-class | 16-bit dsPIC33F, 40 MIPS |
| Flash Memory | 6KB | 6KB | 6KB | 6KB | 6KB |
| Supply Voltage | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V |
| Key Peripherals | High-Speed PWM, ADC, comparators | High-Speed PWM, ADC, comparators | High-Speed PWM, ADC, comparators | High-Speed PWM, ADC, comparators | High-Speed PWM, ADC, comparators |
主な差別化要因
- Current errata-corrected stepping available as pin-compatible drop-in （vs DSPIC33FJ06GS102A-I/SP)
- Digital-power-specific peripheral set vs general-purpose 8-bit DIP MCUs （vs PIC18F1220-I/P)
- Through-hole SPDIP prototyping convenience vs QFN family members （vs DSPIC33FJ06GS101-E/P)
設計ノート
Connect every VDD and VSS pin on the 28-pin SPDIP device even if your first bring-up seems to work; per NorthernSoftware's dsPIC33FJ06GS102 programming notes, leaving a supply pin unconnected can cause intermittent programming failures that look like a broken programmer. Additionally, the PGEC3/PGED3 pair does not function on this device - always route PGEC1/PGED1 to the ICSP header. Label the ICSP connector with pin order to avoid reverse-polarity damage during development.
Design the 3.3V rail for the device's maximum supply current of approximately 160mA (per Microchip USA data for the family) plus peripheral load, rather than typical core current. In digital power applications the controller shares a supply domain with gate-drive circuitry: place a 0.1uF ceramic directly at each VDD/VSS pair plus 4.7-10uF bulk nearby, and isolate the analog reference with an RC filter so PWM switching noise does not degrade ADC accuracy in the current loop.
Estimated: for breadboard prototyping on SPDIP, keep the high-speed PWM traces to the gate driver under about 5 cm and add a ground return directly under each PWM pair to limit ring-up; at 40 MIPS PWM edges in the low-nanosecond range, long unterminated traces on perfboard will radiate. For production migration, Microchip offers the identical die in surface-mount packages within the same GS102 family, so keep the firmware and pin mapping portable to ease the SMT respin.
コンプライアンス情報
Compliance attributes (RoHS, REACH, lead-free) were not stated in the verified web data for this part; confirm on the Microchip product page or distributor compliance certificate before ordering.
