DSPIC33FJ128GP710AT-I/PT - 40MIPS 128KB DSC | Microchip Technology
部品番号: DSPIC33FJ128GP710AT-I/PT ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $7.66 | $7.66 |
| 10 | $7.2 | $72.00 |
| 100 | $6.82 | $682.00 |
| 500 | $6.45 | $3,225.00 |
| 1,000 | $6.05 | $6,050.00 |
DSPIC33FJ128GP710AT-I/PT 概要
A digital signal controller combines the computational throughput of a digital signal processor with the simplicity, ease of use, and peripheral integration of a microcontroller. Within the embedded hierarchy, the dsPIC33F family sits between general-purpose MCUs and dedicated DSPs, providing hardware DSP engine features such as multiply-accumulate instructions while retaining deterministic real-time control behavior.
Key features of this device include the 16-bit dsPIC33F CPU core executing up to 40 MIPS, 128KB of on-chip Flash program memory for substantial code space, and industrial-grade temperature operation to +85C. The GP (General Purpose) variant balances communication peripherals and analog capability, and the device supports In-Circuit Serial Programming (ICSP) via the MPLAB Snap and compatible tools, enabling field debugging with only two I/O pins plus the reset line.
Architecturally, the device is built in CMOS technology with a modified Harvard bus structure supporting simultaneous instruction and data fetch. Microchip offers the Explorer 16/32 Development Board with Plug-In Modules (PIMs) supporting this device family, and the MPLAB X ecosystem covers compilation, simulation, and in-circuit debugging. The AT marking denotes a specific product grade within the dsPIC33FJ128GP710 family, and the /PT suffix identifies the 100-terminal TQFP package with 0.4 mm terminal pitch.
Typical applications include digital power conversion, motor control, sensor fusion and digital filtering, industrial automation, and general-purpose signal processing where 16-bit integer DSP throughput and MCU-style peripherals are required.
Design consideration: supply voltage must remain within the 3.0V to 3.6V window; add robust decoupling at each VDD/VSS pair around the 100-pin TQFP and verify clock configuration early, since oscillator setup is a common bring-up pitfall.
This page synthesizes distributor pricing, drop-in alternatives, comparison data, and practical design notes not found in the manufacturer datasheet, helping engineers evaluate sourcing and second-source options in one place.
ドロップイン代替品: DSPIC33FJ128GP710AT-I/PT — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: DSPIC33FJ128GP710AT-I/PT （同一形状・フットプリント） — 相違点: Package, RoHS Status, Core Architecture, Operating Temperature, Core.
クイック比較ツール — 並列比較する代替部品を選択:
DSPIC33FJ128GP710T-I/PT
✅ ドロップイン✓ 在庫あり
$4.9 / 個
データシートを見る →DSPIC33FJ128GP710A-I/PT
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
DSPIC33FJ128GP710AT-E/PT
✅ ドロップイン📋 参考代替品（カタログ未掲載）
DSPIC33FJ128GP310T-I/PT
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$5.46 / 個
データシートを見る →DSPIC33FJ256GP710A-I/PT
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$15.6 / 個
データシートを見る →DSPIC33FJ128GP710AT-I/PT 最大定格＆電気的特性
| Core | dsPIC33F |
| Core Architecture | 16-bit |
| Max Clock Frequency | 40 MHz |
| Max Performance | 40 MIPS |
| Program Memory Size | 128KB Flash |
| Supply Voltage Range | 3 V to 3.6 V |
| 動作温度 | -40C to +85C |
| パッケージ | 100-TQFP (12x12 mm), 0.4 mm terminal pitch |
| 実装タイプ | Surface Mount |
| Technology | CMOS |
| Product Type | Digital Signal Controller (DSC) |
| Series | dsPIC33FJ128GP710A |
| Packaging | Tube |
| Factory Pack Quantity | 40 |
| Programming/Debug Interface | ICSP (2-wire, via MPLAB Snap) |
| RoHS ステータス | RoHS compliant |
DSPIC33FJ128GP710AT-I/PT 100-tqfp (12x12 mm), 0.4 mm terminal pitch ピン配置ガイド
DSPIC33FJ128GP710AT-I/PT (100-tqfp (12x12 mm), 0.4 mm terminal pitch パッケージ) のピン配置。 このデジタルICには、GPIO、通信インターフェース (UART、SPI、I2C)、および電源ピンが含まれています。代替ピン機能と設定オプションについては、メーカーのデータシートを参照してください。組み込みシステム設計とPCBレイアウトに不可欠です。
詳細なピン配置データはありません: DSPIC33FJ128GP710AT-I/PT.
詳細は データシート をご参照ください。
主な用途
DSPIC33FJ128GP710AT-I/PT の用途: 6 件s: Digital Power Conversion, Motor Control, Industrial Automation and Sensing, Digital Audio and Signal Processing, Medical and Health Monitoring Devices, Embedded Systems Prototyping and Education.
Digital Power Conversion
Digital power supplies, PFC stages, and DC-DC converters benefit directly from the DSPIC33FJ128GP710AT-I/PT's 40 MIPS 16-bit core, which executes Proportional-Integral-Derivative and predictive control loops with deterministic cycle-level timing. The DSC's DSP multiply-accumulate capability accelerates the mathematical core of digital control laws, while its 3.0V to 3.6V operation and industrial -40C to +85C rating suit enclosed power stages. Implemented with switching-frequency interrupts feeding PWM peripherals, the controller closes current and voltage loops in microseconds; the trade-off versus analog controllers is firmware complexity, offset by field-update capability through ICSP programming with MPLAB Snap and superior adaptability to changing load conditions.
おすすめ
Motor Control
Brushless DC, permanent-magnet synchronous, and AC induction motor drives are a core dsPIC33F use case, and the 128KB Flash of the DSPIC33FJ128GP710AT-I/PT accommodates field-oriented control (FOC) stacks with commutation, protection, and communication code in one device. The 40 MIPS throughput sustains current-loop rates in the tens of kilohertz, while the GP-series peripheral set supports the PWM generation and feedback acquisition that motor control demands. Deployed as the single control IC in the drive board, it eliminates a separate gate-driver MCU; designers should budget headroom in the 3.3V rail for gate-driver supply separation and validate fault-response latency, which the deterministic 16-bit core handles predictably versus softer software architectures.
おすすめ
Industrial Automation and Sensing
Factory automation nodes, sensor transmitters, and process-control interfaces use the DSPIC33FJ128GP710AT-I/PT where 16-bit integer DSP filtering (FIR/IIR on the hardware DSP engine) conditions raw sensor data before transmission. The -40C to +85C industrial rating and CMOS process give reliable operation in cabinets and field installations, while 128KB Flash holds protocol stacks plus calibration routines. In a typical 4-20 mA or IO-Link style transmitter, the DSC samples, filters, linearizes, and communicates in a single 100-TQFP device; the 0.4 mm pitch requires standard SMT assembly but no exotic processes. Designers should plan the 3V-3.6V supply tolerance against industrial rail transients with local regulation and protection.
おすすめ
Digital Audio and Signal Processing
Audio effects units, active crossovers, and measurement instruments exploit the dsPIC33F DSP instructions of this DSC to implement filters, mixing, and analysis at 40 MIPS. The GP (General Purpose) variant of the dsPIC33FJ128GP710A family balances communication peripherals for audio data streams with computation for real-time processing, all within the 128KB program memory budget that comfortably hosts multi-band algorithm chains. In a signal chain, the DSC receives digitized audio from an external codec or ADC, applies processing in fixed-point 16-bit arithmetic, and outputs control or processed data; latency is deterministic, which matters for live-sound applications. The 3.3V domain simplifies interfacing with common low-voltage audio ICs.
おすすめ
Medical and Health Monitoring Devices
Portable diagnostic and patient-monitoring equipment leverages the DSPIC33FJ128GP710AT-I/PT for low-noise digital filtering of biopotential and physiological signals, where the DSP multiply-accumulate engine runs notch and bandpass filters on ECG/EEG-class data streams. The 100-pin TQFP provides abundant I/O for displays, buttons, and communication without external expansion, and 128KB Flash holds signal-processing firmware plus UI and logging code. Operating from a regulated 3.3V rail with the device's 3.0V-3.6V window, battery-powered designs stay within a low-voltage domain appropriate for patient-coupled circuits; isolation compliance (IEC 60601-class system design) is handled at the board level with companion isolation components rather than the DSC itself.
おすすめ
Embedded Systems Prototyping and Education
The Explorer 16/32 Development Board from Microchip explicitly supports the dsPIC33F family through Plug-In Modules (PIMs), making the DSPIC33FJ128GP710AT-I/PT an accessible platform for university courses, reference designs, and rapid proof-of-concept work. MPLAB X IDE with the XC16 compiler plus MPLAB Snap debugging over ICSP gives a complete, low-cost toolchain; ICSP uses just two device I/O pins and the reset line, so prototypes carry a minimal debug header. For teams migrating between PIC24F, dsPIC33F, and PIC32 devices, the shared Explorer 16/32 ecosystem shortens learning curves, and the 128KB Flash leaves ample room for multi-module lab projects and demonstration firmware.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: DSPIC33FJ128GP710AT-I/PT — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | DSPIC33FJ128GP710T-I/PT | DSPIC33FJ128GP710A-I/PT | DSPIC33FJ128GP710AT-E/PT | DSPIC33FJ128GP310T-I/PT | DSPIC33FJ256GP710A-I/PT |
|---|---|---|---|---|---|---|
| Package | 100-TQFP (12x12 mm) | 100-TQFP (12x12 mm) - same | 100-TQFP (12x12 mm) - same | 100-TQFP (12x12 mm) - same | 100-TQFP (12x12 mm) - same | 100-TQFP (12x12 mm) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Core Performance | 16-bit dsPIC33F, 40 MIPS | 16-bit, 40 MIPS | 16-bit, 40 MIPS | 16-bit, 40 MIPS | 16-bit, 40 MIPS | 16-bit, 40 MIPS |
| Program Memory | 128KB Flash | 128KB Flash | 128KB Flash | 128KB Flash | 128KB Flash | 256KB Flash |
| Supply Voltage | 3 V to 3.6 V | 3 V to 3.6 V | 3 V to 3.6 V | 3 V to 3.6 V | 3 V to 3.6 V | 3 V to 3.6 V |
| Operating Temperature | -40C to +85C (industrial) | -40C to +85C | -40C to +85C | -40C to +125C (extended) | -40C to +85C | -40C to +85C |
| Max Clock Frequency | 40 MHz | 40 MHz | 40 MHz | 40 MHz | 40 MHz | 40 MHz |
| Temperature Suffix Grade | -I (industrial) | -I (industrial) | -I (industrial) | -E (extended) | -I (industrial) | -I (industrial) |
主な差別化要因
- Extended temperature option available in same footprint （vs DSPIC33FJ128GP710AT-E/PT)
- 128KB Flash balance of cost and code space （vs DSPIC33FJ256GP710A-I/PT)
- AT ordering variant with verified same-die substitutes （vs DSPIC33FJ128GP710T-I/PT)
設計ノート
The DSPIC33FJ128GP710AT-I/PT requires a 3.0V to 3.6V supply (nominal 3.3V). In a 100-pin TQFP there are multiple VDD/VSS pairs distributed around the package; place a 100 nF ceramic decoupling capacitor at every VDD/VSS pair, plus at least one bulk capacitor (4.7-10 uF) near the supply entry. Estimated: with typical active current in the tens of milliamp range at 40 MIPS, a small LDO is sufficient, but verify against your measured current in the actual application since peripheral loading varies widely.
The 0.4 mm terminal pitch of the 100-TQFP (12x12 mm) demands careful footprint control: use the IPC-recommended footprint from Microchip's packaging drawing, non-solder-mask-defined pads, and a standard SAC305 reflow profile. Keep the exposed crystal and oscillator traces short, and route PGEC/PGED programming pins to an accessible ICSP header (two data pins plus MCLR) so MPLAB Snap can connect without board removal. Do not route high-current or switching traces under the device.
Oscillator configuration is the most common bring-up failure on dsPIC33F devices: an incorrect clock configuration can leave the core at an unexpected frequency or prevent debug connection. Verify fuse/clock settings in MPLAB X before first programming, and keep the ICSP header installed on first-revision boards. Also confirm the supply stays within 3.6V absolute maximum when sharing a 3.3V rail with other logic, since transient overshoot can exceed the rating and latch-damage the CMOS die.
コンプライアンス情報
RoHS compliance indicated in distributor specification listings (digchip). REACH, halogen-free, and conflict-minerals declarations not stated in provided data; request certificates from Microchip.
