LTC7132EY - Dual 25A PolyPhase Step-Down Regulator | Analog Devices
部品番号: LTC7132EY ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $17.54 | $17.54 |
| 10 | $15.62 | $156.20 |
| 100 | $14.18 | $1,418.00 |
| 500 | $13.42 | $6,710.00 |
| 1,000 | $13.82 | $13,820.00 |
LTC7132EY 概要
A buck (step-down) DC/DC converter is a switching regulator category that reduces a higher DC input voltage to a lower, precisely regulated output voltage. Within the broader taxonomy of power management ICs, the LTC7132EY sits at the high-current, multi-rail, digitally-managed end of the spectrum: buck regulator > synchronous step-down regulator > PolyPhase regulator > digital PMBus power management IC > power management semiconductor. This hierarchy explains why the part is specified in telecom, datacom, and FPGA/ASIC point-of-load contexts.
The LTC7132 employs constant-frequency peak current-mode control with a unique PolyPhase architecture that splits the 25A per rail into interleaved phases to reduce input/output ripple and shrink bulk capacitors. Integrated N-channel MOSFETs, the gate drivers, the feedback loop compensation, and the PMBus interface live in a single die; only input capacitors, output inductors, sense resistors, and feedback resistors are external. Internal EEPROM (NVM) retains trim, fault thresholds, and telemetry configuration through power cycles, eliminating external programming components.
Key parametric highlights include: 25A continuous output per channel (up to 50A combined in parallel), PMBus 1.2 compliant I2C serial interface with status telemetry for VIN, VOUT, IOUT, temperature, and switching frequency, internal non-volatile memory for configuration, programmable current limit, and a thermally-enhanced FBGA package with an exposed die-side ground paddle for low theta-JA. The switching frequency is resistor-programmable.
Typical applications include 48V telecom intermediate bus conversion to 3.3V, 5V, or 1.8V point-of-load rails, FPGA/ASIC core and transceiver supply in datacom switches and routers, industrial test and measurement equipment requiring PMBus telemetry, and high-end server/storage boards needing tightly managed multi-rail sequencing. The PMBus interface also enables real-time monitoring of input voltage, output voltage, output current, junction temperature, switching frequency, and fault status.
When designing with the LTC7132EY, prioritize PCB layout to keep the high-current loops and the small-signal ground return paths short and isolated. Place input ceramic capacitors immediately adjacent to the VIN balls and use the full bottom-side ground paddle as a heat spreader with adequate thermal vias. Use the PMBus interface to set soft-start, OV/UV thresholds, current limit, and switching frequency rather than relying solely on external pins.
This page synthesizes distributor pricing, verified drop-in alternatives, application circuits, and design guidance not consolidated in the manufacturer datasheet. Engineers selecting a 25A-class PolyPhase regulator with PMBus telemetry will find the comparison table, FAQ, and design notes useful for sourcing and BOM validation decisions.
ドロップイン代替品: LTC7132EY — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
LTC7132EY#PBF
✅ ドロップイン📋 参考代替品（カタログ未掲載）
LTC7132IY#PBF
✅ ドロップイン📋 参考代替品（カタログ未掲載）
LTC7132MPY#PBF
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
LTC7132HY#PBF
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
LTC7150SEY#PBF
✅ ドロップイン📋 参考代替品（カタログ未掲載）
LTC7132EY 最大定格＆電気的特性
| トポロジー | Synchronous Buck (Step-Down) |
| 出力数 | 2 (independent) |
| Output Current (per channel) | 25 A |
| Output Current (combined) | 50 A |
| 出力電圧範囲 | 0.5 V to adjustable |
| Switching Architecture | PolyPhase, constant-frequency peak current-mode |
| Digital Interface | PMBus 1.2 compliant I2C |
| On-Chip NVM | Yes (configuration retention) |
| パッケージ | 140-ball FBGA, 12 mm x 11 mm |
| 実装タイプ | Surface Mount |
| 動作接合温度 | -40C to +125C |
| MSLレベル | 3 |
| RoHS ステータス | Compliant |
| Lead-Free (PBF) | Yes (suffix #PBF) |
| Sample / Buy | Recommended for new designs |
LTC7132EY 140-ball fbga, 12 mm x 11 mm ピン配置ガイド
LTC7132EY (140-ball fbga, 12 mm x 11 mm パッケージ) のピン配置。 このパワーデバイスは、ゲート、ドレイン、ソース端子を備えています。非極性パッケージの場合、正確なピン1の向きとフットプリントの詳細については、メーカーのデータシートを参照してください。主な用途には、電源設計、モータ駆動、負荷スイッチングがあります。
詳細なピン配置データはありません: LTC7132EY.
詳細は データシート をご参照ください。
主な用途
LTC7132EY の用途: 6 件s: 48V Telecom Intermediate Bus Conversion, FPGA / ASIC Point-of-Load in Datacom, Industrial Test and Measurement Equipment, Server and Storage Board Power, High-Current Multi-Rail ASIC Boards, Defense / Aerospace Avionics Power.
48V Telecom Intermediate Bus Conversion
The LTC7132EY fits 48V telecom intermediate bus conversion to lower point-of-load rails because each of its two synchronous buck outputs delivers 25 A continuous and supports adjustable output from 0.5 V. With PolyPhase interleaving, input and output ripple are dramatically reduced versus single-phase designs, allowing smaller bulk capacitors and tighter EMI compliance. Its PMBus interface lets system controllers monitor bus voltage, output current, and junction temperature in real time, which is critical for hot-swap and OR-ing events in telecom shelves. The 140-FBGA package with thermal paddle supports the high continuous dissipation typical of telecom rails when properly thermal-via'd to the inner ground layers.
おすすめ
FPGA / ASIC Point-of-Load in Datacom
The LTC7132EY serves FPGA and ASIC point-of-load supplies in datacom switches and routers where each rail may require up to 25 A at sub-1 V core voltages with strict dynamic load tolerance. Its 0.5 V minimum output and constant-frequency peak current-mode control deliver the fast transient response modern FPGAs demand during clock gating and rapid load steps. The integrated PMBus telemetry provides the observability needed to debug power integrity issues at the chip level, while on-chip NVM stores rail-specific trim values that production teams can program per board variant. PolyPhase interleaving between the two outputs minimizes input ripple seen by upstream intermediate bus converters.
おすすめ
Industrial Test and Measurement Equipment
The LTC7132EY is well matched to industrial test and measurement equipment that requires tightly regulated, multi-output power with full digital telemetry. Each 25 A rail can drive FPGA processing boards, ADC/DAC analog rails, and motor driver pre-regulators from a common 24 V or 48 V input, all while exposing telemetry to the system controller via PMBus. The device's E-grade (LTC7132EY) is rated 0C to 85C and is suitable for indoor industrial enclosures; the I-grade (LTC7132IY) variant extends this to -40C to +125C for harsher factory-floor environments. The exposed thermal-paddle FBGA enables continuous full-load operation when paired with adequate PCB copper and thermal vias.
おすすめ
Server and Storage Board Power
The LTC7132EY powers server and storage board subsystems where two independent 25 A rails (50 A combined) replace multiple discrete converters and reduce BOM count. In a typical server VR design, one output drives core processor rails while the second handles memory and I/O subsystems, sharing the input filter and thermal dissipation across the same IC. The PMBus interface allows the BMC to monitor per-rail VOUT, IOUT, and temperature for predictive failure analysis and dynamic power capping. With on-chip NVM, the IC retains its configuration through power cycles without external EEPROM, simplifying manufacturing flow.
おすすめ
High-Current Multi-Rail ASIC Boards
The LTC7132EY simplifies multi-rail ASIC board design by providing two independent 25 A outputs plus PMBus telemetry in a single BGA footprint. Modern networking ASICs, switch chips, and AI accelerator silicon often require parallel rails for core, SerDes, and PHY domains with strict sequencing - the LTC7132EY's PMBus-controlled soft-start and rail-to-rail fault response enable precise sequencing without external logic. The 25 A per channel capability covers even power-hungry AI inference accelerators in compact form factors, while the PolyPhase interleaving between channels reduces input capacitor stress. Engineers benefit from the on-chip NVM which stores per-board calibration data for the manufacturing test fixture.
おすすめ
Defense / Aerospace Avionics Power
The LTC7132MPY variant (military-grade -55C to +125C with extended screening) of the same die serves avionics and defense applications requiring high-reliability point-of-load conversion. Mission-critical embedded compute, sensor front-ends, and RF signal processing boards all benefit from the dual 25 A capability plus PMBus observability for health monitoring. The MPY variant maintains the same 140-FBGA footprint and pinout as the E-grade LTC7132EY, allowing PCB reuse between commercial and military board variants. The PMBus fault log and telemetry provide the trace data required for flight-worthy certification and field failure analysis.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: LTC7132EY — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | LTC7132EY#PBF | LTC7132IY#PBF | LTC7132MPY#PBF | LTC7132HY#PBF | LTC7150SEY#PBF |
|---|---|---|---|---|---|---|
| Package | 140-FBGA, 12x11 mm | 140-FBGA, 12x11 mm - same | 140-FBGA, 12x11 mm - same | 140-FBGA, 12x11 mm - same | 140-FBGA, 12x11 mm - same | 140-FBGA, 12x11 mm - same |
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Output Current per Channel | 25 A | 25 A | 25 A | 25 A | 25 A | 20 A |
| Number of Outputs | 2 | 2 | 2 | 2 | 2 | 2 |
| Junction Temperature Range | 0C to +85C (E-grade) | 0C to +85C (E-grade) | -40C to +125C (I-grade) | -55C to +125C (MP-grade) | -40C to +125C (H-grade) | -40C to +125C |
| Output Voltage Minimum | 0.5 V | 0.5 V | 0.5 V | 0.5 V | 0.5 V | 0.5 V |
| PMBus Interface | Yes (PMBus 1.2) | Yes (PMBus 1.2) | Yes (PMBus 1.2) | Yes (PMBus 1.2) | Yes (PMBus 1.2) | Yes (PMBus 1.2) |
| On-Chip NVM | Yes | Yes | Yes | Yes | Yes | Yes |
| RoHS / Lead-Free | Yes (#PBF) | Yes | Yes | Yes | Yes | Yes |
主な差別化要因
- Integrated non-volatile memory for autonomous startup （vs LTC3638)
- Dual 25A PolyPhase outputs in single BGA （vs LTC3638 (single 20A))
- PMBus 1.2 compliant with telemetry （vs LTM4650 (analog μModule))
設計ノート
The 140-ball FBGA package requires a 4-layer PCB minimum with the bottom-side ground paddle soldered to a continuous ground copper pour. Use an array of 0.3 mm thermal vias under the die paddle to spread heat into the inner ground plane. Per Analog Devices reference layouts, the input ceramic capacitors must be placed within 2 mm of the VIN balls to minimize high-current loop inductance, which directly affects switching noise and efficiency.
Estimated: At 48V input, 3.3V output, and 25A continuous per rail, the LTC7132EY dissipates approximately (48-3.3)*25 = 1.12 kW of heat across both rails combined. The FBGA package with a well-via'd ground paddle requires forced airflow above 35A total load; without airflow, derate to roughly 60-70% of rated current to keep junction temperature below 125C. Always verify with a thermal probe in production PCBs.
Do not hot-plug VIN without a controlled soft-start or upstream OR-ing controller - the LTC7132EY's input capacitors present large inrush currents that can trigger upstream protection or damage the bond wires. Program the soft-start rate and current limit via PMBus during manufacturing test, and always verify that the boot sequence matches the downstream load's voltage tolerance. Per Analog Devices datasheet Rev. B, the LTC7132E is rated 0C to 85C junction - choose LTC7132IY for industrial -40C to +125C operation.
コンプライアンス情報
RoHS compliant per Analog Devices product page; #PBF suffix confirms lead-free. AEC-Q100 not applicable - this is a non-automotive industrial/datacom part. Halogen-free status not stated in verified data.
