MC68882EI16AR - 16 MHz HCMOS FPU Co-Processor | NXP 68-PLCC
部品番号: MC68882EI16AR ✗ 生産終了| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $57.74 | $57.74 |
| 10 | $52 | $520.00 |
| 100 | $46.5 | $4,650.00 |
| 500 | $41.2 | $20,600.00 |
| 1,000 | $37.75 | $37,750.00 |
MC68882EI16AR 概要
A floating-point unit (FPU), also called a math co-processor or numeric co-processor, is a specialized integrated circuit that accelerates floating-point arithmetic operations - addition, subtraction, multiplication, division, square root and transcendental functions - far beyond the throughput of a general-purpose integer CPU. The MC68882 sits on the M68000 family bus as a companion to the host CPU, offloading scalar and vector floating-point work via the standardized M68000 co-processor interface. Synonyms include FPU, floating-point accelerator, math co-processor, and numeric processor; hierarchy: FPU -> math co-processor -> specialized IC -> integrated circuit -> semiconductor.
Key features include IEEE 754 compliant single (32-bit) and double (64-bit) precision, extended (80-bit) precision registers, full 8 80-bit data registers, support for the M68000 co-processor interface, and pin/functional compatibility with the broader MC68882 family. The 'E' industrial temperature grade spans -40C to +85C, the 'I' indicates the 16 MHz speed grade, and the 'AR' suffix denotes a tape-and-reel PLCC package for surface-mount assembly.
Architecturally, the MC68882 uses a hardwired control unit rather than microcode, a fully pipelined floating-point execution core, and conforms to the IEEE 754-1985 standard including denormalized numbers, four rounding modes, and full trap handling. It communicates with the host MPU through dedicated M68000 co-processor protocol signals including FCOFC, FCIACK, FDOFC, and FDIACK.
Typical applications include workstation-class numeric computing, CAD/CAM systems, scientific instrumentation, real-time signal processing where floating-point precision is required, and legacy M68000 platform upgrades. The part is also broadly present in industrial embedded controllers, avionics (where still qualified), and military retrofit programs that depend on the long-lifecycle 68k ecosystem.
When designing with this co-processor, ensure the host MPU is configured to drive the M68000 co-processor handshake lines and that bus arbitration timing matches the 16 MHz clock. Note that the MC68882 is a mature EOL/NRND part; confirm long-term availability with NXP franchised distributors before committing to new designs.
This page synthesizes distributor pricing, drop-in alternative candidates, and design considerations for legacy 68k systems not consolidated on a single OEM product page.
ドロップイン代替品: MC68882EI16AR — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: MC68882EI16AR (同一形状・フットプリント) — 相違点: Package, Mounting Type, Supply Voltage, Process Technology, Data Registers.
クイック比較ツール — 並列比較する代替部品を選択:
MC68882EI20A
✅ ドロップイン✓ 在庫あり
$38.1 / 個
データシートを見る →MC68882EI25A
✅ ドロップイン✓ 在庫あり
$71.4 / 個
データシートを見る →MC68882RC16A
✅ ドロップイン✓ 在庫あり
$48.5 / 個
データシートを見る →MC68882EI16A
✅ ドロップイン✓ 在庫あり
$36.94 / 個
データシートを見る →MC68882EI16AR 最大定格&電気的特性
| Part Type | Floating-Point Co-Processor (FPU) |
| Manufacturer | NXP Semiconductors (formerly Motorola/Freescale) |
| Architecture / Family | M68000 Co-Processor (pairs with MC68020/MC68030) |
| Clock Frequency | 16 MHz |
| Floating-Point Standard | IEEE 754-1985 (single, double, extended 80-bit) |
| Data Registers | 8 x 80-bit floating-point data registers |
| Instruction Set | F-line M68000 co-processor interface |
| Operating Modes | 4 IEEE rounding modes; denormalized numbers; full exception handling |
| 動作温度 | -40C to +85C (industrial grade, 'EI' suffix) |
| 電源電圧 | 5 V +/- 5 % |
| Process Technology | HCMOS |
| パッケージ | 68-pin PLCC (24.21 mm x 24.21 mm) |
| 実装タイプ | Surface Mount |
| Speed Grade Suffix | I = 16 MHz |
| Temperature Grade | E = -40C to +85C industrial |
| Packaging Suffix | AR = Tape and Reel, 68-pin PLCC |
MC68882EI16AR ピン構成
| ピン 1 | GND — Ground reference |
| ピン 2 | FCOFC — F-line coprocessor output fetch |
| ピン 3 | FCIACK — F-line coprocessor input acknowledge |
| ピン 4 | FDOFC — F-line data output fetch |
| ピン 5 | FDIACK — F-line data input acknowledge |
| ピン 6 | DSACK0 — Data transfer and size acknowledge 0 |
| ピン 7 | DSACK1 — Data transfer and size acknowledge 1 |
| ピン 8 | AVEC — Autovector interrupt request |
| ピン 9 | IPL0 — Interrupt priority level 0 |
| ピン 10 | IPL1 — Interrupt priority level 1 |
| ピン 11 | IPL2 — Interrupt priority level 2 |
| ピン 12 | VCC — +5 V power supply |
| ピン 13 | D0 — Data bus bit 0 |
| ピン 14 | D1 — Data bus bit 1 |
| ピン 15 | D2 — Data bus bit 2 |
| ピン 16 | D3 — Data bus bit 3 |
| ピン 17 | D4 — Data bus bit 4 |
| ピン 18 | D5 — Data bus bit 5 |
| ピン 19 | D6 — Data bus bit 6 |
| ピン 20 | D7 — Data bus bit 7 |
| ピン 21 | D8 — Data bus bit 8 |
| ピン 22 | D9 — Data bus bit 9 |
| ピン 23 | D10 — Data bus bit 10 |
| ピン 24 | D11 — Data bus bit 11 |
| ピン 25 | D12 — Data bus bit 12 |
| ピン 26 | D13 — Data bus bit 13 |
| ピン 27 | D14 — Data bus bit 14 |
| ピン 28 | D15 — Data bus bit 15 |
| ピン 29 | D16 — Data bus bit 16 |
| ピン 30 | D17 — Data bus bit 17 |
| ピン 31 | D18 — Data bus bit 18 |
| ピン 32 | D19 — Data bus bit 19 |
| ピン 33 | D20 — Data bus bit 20 |
| ピン 34 | D21 — Data bus bit 21 |
| ピン 35 | D22 — Data bus bit 22 |
| ピン 36 | D23 — Data bus bit 23 |
| ピン 37 | D24 — Data bus bit 24 |
| ピン 38 | D25 — Data bus bit 25 |
| ピン 39 | D26 — Data bus bit 26 |
| ピン 40 | D27 — Data bus bit 27 |
| ピン 41 | D28 — Data bus bit 28 |
| ピン 42 | D29 — Data bus bit 29 |
| ピン 43 | D30 — Data bus bit 30 |
| ピン 44 | D31 — Data bus bit 31 |
| ピン 45 | A0 — Address bus bit 0 |
| ピン 46 | A1 — Address bus bit 1 |
| ピン 47 | A2 — Address bus bit 2 |
| ピン 48 | A3 — Address bus bit 3 |
| ピン 49 | A4 — Address bus bit 4 |
| ピン 50 | A5 — Address bus bit 5 |
| ピン 51 | A6 — Address bus bit 6 |
| ピン 52 | A7 — Address bus bit 7 |
| ピン 53 | A8 — Address bus bit 8 |
| ピン 54 | A9 — Address bus bit 9 |
| ピン 55 | A10 — Address bus bit 10 |
| ピン 56 | A11 — Address bus bit 11 |
| ピン 57 | A12 — Address bus bit 12 |
| ピン 58 | A13 — Address bus bit 13 |
| ピン 59 | A14 — Address bus bit 14 |
| ピン 60 | A15 — Address bus bit 15 |
| ピン 61 | A16 — Address bus bit 16 |
| ピン 62 | A17 — Address bus bit 17 |
| ピン 63 | A18 — Address bus bit 18 |
| ピン 64 | A19 — Address bus bit 19 |
| ピン 65 | A20 — Address bus bit 20 |
| ピン 66 | A21 — Address bus bit 21 |
| ピン 67 | A22 — Address bus bit 22 |
| ピン 68 | A23 — Address bus bit 23 |
主な用途
MC68882EI16AR の用途: 6 件s: Workstation-Class Numeric Computing, CAD/CAM and EDA Workstations, Industrial Embedded Controllers, Scientific Instrumentation, Real-Time Signal Processing, Legacy 68k Platform Maintenance.
Workstation-Class Numeric Computing
The MC68882EI16AR brings IEEE 754 single, double, and extended 80-bit arithmetic to M68020/MC68030-based workstations, accelerating numerically intensive workloads in CAD, scientific computing, and engineering simulation. Pairs naturally with host MCUs like the MC68020RC16B for a complete numeric platform.
おすすめ
CAD/CAM and EDA Workstations
CAD/CAM and electronic-design-automation workstations from the late 1980s and 1990s relied on the MC68882EI16AR's hardwired floating-point pipeline to deliver real-time transforms, ray-tracing, and SPICE simulation throughput that integer-only 68k CPUs could not provide. The 16 MHz clock and industrial temperature grade suit office and lab environments.
おすすめ
Industrial Embedded Controllers
Industrial motion controllers, PLCs, and process-control systems use the MC68882EI16AR for deterministic floating-point math in PID loops, sensor fusion, and real-time control algorithms. The industrial -40C to +85C operating range and HCMOS low-power design suit plant-floor deployments requiring long-term support.
おすすめ
Scientific Instrumentation
Bench-top and rack-mount scientific instruments - oscilloscopes, spectrum analyzers, signal analyzers from the M68000 era - integrate the MC68882EI16AR to deliver IEEE 754-precise FFTs, calibration math, and measurement post-processing. Its 80-bit extended precision reduces rounding error in long measurement chains and integration routines.
おすすめ
Real-Time Signal Processing
Radar, sonar, and signal-intelligence subsystems built on the M68000 architecture used the MC68882EI16AR's pipelined FMUL/FDIV unit to compute floating-point DSP kernels (filters, FFT butterflies, beamforming weights) in real time. The part's hardwired control logic gives deterministic latency that is valuable in tight real-time loops.
おすすめ
Legacy 68k Platform Maintenance
Long-lifecycle military, avionics, transportation, and medical systems deployed in the 1990s and still in service today depend on the MC68882EI16AR for field upgrades and form-fit-function replacements. Sourcing through Rochester Electronics and authorized NXP partners ensures form-fit-function continuity for platforms where requalification of a new FPU is impractical.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: MC68882EI16AR — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | MC68882EI20A | MC68882EI25A | MC68882RC16A | MC68882EI16A |
|---|---|---|---|---|---|
| Package | 68-pin PLCC (24.21 x 24.21 mm) | 68-pin PLCC (24.21 x 24.21 mm) | 68-pin PLCC (24.21 x 24.21 mm) | 68-pin PLCC (24.21 x 24.21 mm) | 68-pin PLCC (24.21 x 24.21 mm) |
| Brand | NXP Semiconductors | NXP Semiconductors (formerly Motorola/Freescale) | NXP Semiconductors (formerly Motorola/Freescale) | NXP Semiconductors (formerly Motorola/Freescale) | NXP Semiconductors (formerly Motorola/Freescale) |
| Clock Frequency | 16 MHz | 20 MHz | 25 MHz | 16 MHz | 16 MHz |
| Temperature Range | -40C to +85C (Industrial) | -40C to +85C (Industrial) | -40C to +85C (Industrial) | 0C to +70C (Commercial) | -40C to +85C (Industrial) |
| FP Standard | IEEE 754 (32/64/80-bit) | IEEE 754 (32/64/80-bit) | IEEE 754 (32/64/80-bit) | IEEE 754 (32/64/80-bit) | IEEE 754 (32/64/80-bit) |
| Host Interface | M68000 co-processor (MC68020/030) | M68000 co-processor (MC68020/030) | M68000 co-processor (MC68020/030) | M68000 co-processor (MC68020/030) | M68000 co-processor (MC68020/030) |
| Lifecycle Status | NRND | NRND | NRND | NRND | NRND |
| Throughput vs This Part | 1.00x baseline | 1.25x (+25 %) | 1.56x (+56 %) | 1.00x baseline | 1.00x baseline |
主な差別化要因
- Higher host clock throughput at drop-in cost (vs MC68882EI20A)
- Industrial temperature grade over commercial equivalent (vs MC68882RC16A)
- Original-tape-and-reel packaging for SMT (vs MC68882EI16A)
設計ノート
The MC68882 cannot be used with the MC68040 or MC68060 because those CPUs include an on-die FPU; adding an external MC68882 will cause bus contention and undefined behavior. It is exclusively for MC68020 and MC68030 hosts.
The MC68882 family has been NRND for years and is widely considered obsolete. New designs should not commit to this part; existing 68k systems should establish long-term supply agreements with NXP franchised distributors or contract manufacturing partners such as Rochester Electronics.
On PLCC land patterns, route the FCOFC/FCIACK/FDOFC/FDIACK co-processor handshake lines with matched lengths to the host MPU and keep them isolated from address/data bus switching to avoid handshake glitches. Place 0.1 uF ceramic bypass capacitors within 5 mm of each VCC pin and a bulk 10 uF tantalum near the package.
Estimated: at 16 MHz and typical 5 V / 0.5 A load, the MC68882EI16AR dissipates approximately 1.5 W. The 68-pin PLCC has a theta_JA around 35-45 C/W, yielding a junction temperature rise of 50-70 C above ambient. For sealed enclosures, derate by 30 % and verify with a thermal probe at the package top.
コンプライアンス情報
RoHS, lead-free, and halogen-free status were not in the verified web data and are not assumed. AEC-Q100 is not applicable because this is a legacy MPU co-processor, not an automotive-grade IC.