MCIMX6Q6AVT10AC - i.MX6 Quad 1GHz ARM Cortex-A9 MPU | NXP
部品番号: MCIMX6Q6AVT10AC ✗ 生産終了| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $38.5 | $38.50 |
| 10 | $34.75 | $347.50 |
| 100 | $30.2 | $3,020.00 |
| 500 | $26.85 | $13,425.00 |
| 1,000 | $24.1 | $24,100.00 |
MCIMX6Q6AVT10AC 概要
An applications processor (AP) is a system-on-chip (SoC) class microprocessor that integrates CPU cores, GPU, memory controller, multimedia accelerators, and a rich set of peripheral interfaces onto a single die. The i.MX 6 family sits at the high end of NXP's multimedia applications processor lineup and is widely used in automotive infotainment, industrial HMI, and medical imaging. The Quad variant delivers four Cortex-A9 cores that can run an SMP operating system such as Linux or Android, with each core capable of out-of-order execution and NEON SIMD extensions.
Key features of the MCIMX6Q6AVT10AC include four ARM Cortex-A9 cores at up to 1.0 GHz, dual-port graphics with separate 3D (GC2000, ~25 MTriangles/s, ~200 Mpix/s) and 2D/vector GPUs, hardware-accelerated 1080p60 H.264 BP/MP/HP encode/decode plus VP8 decode, support for DDR3 and LPDDR2 memory up to 64-bit, multiple display interfaces (HDMI 1.4, LVDS, MIPI-DSI, parallel RGB), and a wide peripheral mix including USB 2.0 with PHY, PCIe 2.0, SATA II, Gigabit Ethernet, CAN, UART, SPI, I2C, and I2S. It is automotive-qualified for the -40C to +125C Tj range and integrates an advanced security and boot authentication block.
Architecture-wise, the device pairs an ARM Cortex-A9 MPCore complex with a Cortex-M4 for low-power real-time tasks on some variants, but on the 6Quad it is the four A9 cores that drive performance. The integrated Smart Speed Technology uses dynamic voltage and frequency scaling (DVFS) to reduce power consumption when full throughput is not required. The multilevel memory system combines L1 instruction/data caches, a unified L2 cache, and on-chip SRAM/ROM for fast boot.
Typical applications include automotive infotainment head units, advanced driver assistance (ADAS) display controllers, industrial HMI panels, medical imaging and patient monitoring displays, smart-home gateways, and single-board computers for multimedia. In automotive head units the chip drives the central touchscreen plus a rear-seat display, runs QNX or Automotive Grade Linux, and decodes 1080p video for navigation and camera views.
When designing with the MCIMX6Q6AVT10AC, ensure the PCB uses the 0.8 mm pitch 624-ball FCBGA land pattern and a 6+ layer stack-up with continuous GND planes to handle the multi-gigabit DDR3 interfaces; engineers should also provision a 3.3 V main rail and a 1.1 V core VCORE rail generated by an external PMU such as the PF3000/PCA9450. The variant's trailing "AC" suffix denotes the specific silicon revision and operating temperature grade, so confirm against the NXP i.MX 6 reference manual when migrating from MCIMX6Q6AVT10AD or MCIMX6Q6AVT10AE.
This page synthesizes NXP distributor pricing, FCBGA-624 drop-in alternatives within the i.MX6 Quad family, and practical design notes that complement the manufacturer datasheet.
ドロップイン代替品: MCIMX6Q6AVT10AC — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: MCIMX6Q6AVT10AC （同一形状・フットプリント） — 相違点: Memory Interface, Series, Mounting Type, Core Architecture, Display Interfaces.
クイック比較ツール — 並列比較する代替部品を選択:
MCIMX6Q6AVT10AD
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MCIMX6Q6AVT10AE
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MCIMX6D6AVT10AC
✅ ドロップイン✓ 在庫あり
$47.8 / 個
データシートを見る →MCIMX6D4AVT08AD
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MCIMX6Q5AVT10AD
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MCIMX6Q6AVT10AC 最大定格＆電気的特性
| Series | i.MX 6Quad |
| Core Architecture | ARM Cortex-A9 MPCore (4 cores) |
| Core Count | 4 |
| データバス幅 | 32-bit |
| Maximum CPU Frequency | 1.0 GHz |
| Graphics Processor | Vivante GC2000 (3D) + GC355 (3D) + GC320 (2D) |
| Video Processing | 1080p60 H.264 BP/MP/HP encode/decode, VP8 decode |
| Memory Interface | DDR3 / LPDDR2, 32-bit and 64-bit, up to 2 GB |
| Display Interfaces | HDMI 1.4, LVDS (2x), MIPI-DSI (2 lanes), parallel RGB |
| Peripheral Interfaces | USB 2.0 with PHY, PCIe 2.0, SATA II, Gigabit Ethernet (2x), CAN (2x), UART, SPI, I2C, I2S, ESAI |
| Security | High Assurance Boot (HAB), cryptographic accelerators, RNG |
| 動作温度範囲 | -40C to +125C (Tj, automotive grade) |
| Package Type | FCBGA-624 (21 mm x 21 mm, 0.8 mm pitch) |
| 実装タイプ | Surface Mount |
| MSLレベル | 3 (per JEDEC J-STD-020) |
| RoHS ステータス | Compliant |
| Product Status | NRND (Not Recommended for New Designs) |
MCIMX6Q6AVT10AC fcbga-624 (21 mm x 21 mm, 0.8 mm pitch) ピン配置ガイド
MCIMX6Q6AVT10AC (fcbga-624 (21 mm x 21 mm, 0.8 mm pitch) パッケージ) のピン配置。 このデジタルICには、GPIO、通信インターフェース (UART、SPI、I2C)、および電源ピンが含まれています。代替ピン機能と設定オプションについては、メーカーのデータシートを参照してください。組み込みシステム設計とPCBレイアウトに不可欠です。
詳細なピン配置データはありません: MCIMX6Q6AVT10AC.
詳細は データシート をご参照ください。
主な用途
MCIMX6Q6AVT10AC の用途: 6 件s: Automotive Infotainment Head Unit, Industrial HMI Touch Panel, Medical Imaging Display Controller, Smart Home Gateway / Hub, Single-Board Computer (SBC) / Multimedia Appliance, ADAS Surround-View Display Module.
Automotive Infotainment Head Unit
The MCIMX6Q6AVT10AC is a strong fit for central automotive infotainment head units because its four 1.0 GHz Cortex-A9 cores deliver the throughput needed to run Automotive Grade Linux or QNX while simultaneously decoding 1080p60 H.264 video for navigation, rear-camera, and media playback. The integrated Vivante GC2000/GC355/GC320 GPU handles the OpenGL ES compositor for the touchscreen plus dual rear-seat displays through the parallel RGB, LVDS, and HDMI 1.4 outputs. AEC-Q100 qualification at -40C to +125C Tj means the part survives the under-dash thermal environment without derating, while the integrated High Assurance Boot block and cryptographic accelerators secure the CAN and Ethernet gateway against unauthorized firmware. Reference companion parts include the NXP PF3000/PCA9450 PMIC for rail sequencing, TJA1044T CAN transceivers, and the TDA19988 HDMI transmitter.
おすすめ
Industrial HMI Touch Panel
The MCIMX6Q6AVT10AC fits industrial HMI panels because the Vivante GC2000 GPU renders rich Qt/WebGL HMIs at 1080p60 with the four Cortex-A9 cores reserved for control logic and protocol stacks. Its dual CAN, dual Gigabit Ethernet, USB 2.0, and PCIe 2.0 lanes let a single chip host the touch controller, multiple fieldbus gateways (EtherCAT, PROFINET, Modbus TCP), and a Gigabit uplink without an external MPU. The -40C to +125C junction range covers sealed panel installations in factory cabinets, and the integrated HAB boot block ensures only signed firmware runs on the machine, satisfying IEC 62443 expectations. The chip's hardware 1080p codec is also useful for inline vision display alongside the HMI. Pair it with the PCA9450A PMIC and a DDR3L memory array for a production-ready design.
おすすめ
Medical Imaging Display Controller
The MCIMX6Q6AVT10AC is suitable for medical imaging display controllers that drive diagnostic-grade LCDs because its HDMI 1.4 and dual LVDS outputs feed the panel backplane at full 1080p with hardware-accelerated H.264 decode for live ultrasound or endoscopy streams. The four Cortex-A9 cores run the embedded medical UI, image-processing pipelines, and DICOM network stack concurrently, while the integrated security block supports HIPAA-relevant boot authentication and encrypted storage. AEC-Q100-style temperature margins help with the long uptime expected in clinical carts. Reference companion parts include the PF3000 PMIC, a TI ISO7760 isolator for patient-side serial links, and an external eMMC for non-volatile image storage.
おすすめ
Smart Home Gateway / Hub
The MCIMX6Q6AVT10AC suits premium smart-home gateways because the four Cortex-A9 cores concurrently run a Linux userspace with Matter/Thread/Zigbee stacks, voice-agent wake-word handling, and local UI rendering on a wall-mounted touchscreen. The integrated dual Gigabit Ethernet MAC plus PCIe 2.0 lane hosts a Wi-Fi 6 NIC, the USB 2.0 with PHY attaches a Thread/Zigbee radio dongle, and the I2S/ESAI ports feed a Class-D audio amplifier for voice prompts. The hardware 1080p decoder is used for door-camera pop-ups on the gateway display, and the HAB boot block enforces signed firmware updates. Pair it with the PCA9450A PMIC, a BCM43752 Wi-Fi 6 companion, and DDR3L memory.
おすすめ
Single-Board Computer (SBC) / Multimedia Appliance
The MCIMX6Q6AVT10AC fits multimedia single-board computers because its i.MX 6Quad SoC integrates CPU, GPU, VPU, and display pipeline in a single 624-ball FCBGA, eliminating the multi-chip cost of competing designs. Designers get 1080p60 H.264 encode/decode for streaming media plus a Vivante GC2000 GPU for hardware-accelerated Qt/WebGL UIs, while the four Cortex-A9 cores run a full Linux distribution. The 21x21 mm FCBGA and 0.8 mm pitch keep the baseboard to a 6-layer stack-up with microvias, which is achievable on standard FR-4 processes. Pair it with a PCA9450A PMIC, DDR3L memory, and an external HDMI retimer.
おすすめ
ADAS Surround-View Display Module
The MCIMX6Q6AVT10AC fits ADAS surround-view display modules because the four Cortex-A9 cores overlay and composite four camera streams in real time, while the Vivante GPU renders the bird's-eye and 3D perspective views onto the cluster LCD via LVDS. Hardware 1080p H.264 decode offloads the recorded surround-view playback, and the two CAN interfaces hook directly into the vehicle bus for steering-angle and gear-state data. The chip's AEC-Q100 qualification to +125C Tj handles behind-the-dash thermals. Pair it with the PCA9450A PMIC, MAX9286 quad GMSK deserializer, and a TFGA-grade LPDDR2 memory array.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: MCIMX6Q6AVT10AC — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | MCIMX6Q6AVT10AD | MCIMX6Q6AVT10AE | MCIMX6D6AVT10AC | MCIMX6D4AVT08AD | MCIMX6Q5AVT10AD |
|---|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | FCBGA-624 (21x21, 0.8 mm pitch) | FCBGA-624 (21x21) - same | FCBGA-624 (21x21) - same | FCBGA-624 (21x21) - same | FCBGA-624 (21x21) - same | FCBGA-624 (21x21) - same |
| Core Architecture | ARM Cortex-A9 quad-core | ARM Cortex-A9 quad-core | ARM Cortex-A9 quad-core | ARM Cortex-A9 dual-core | ARM Cortex-A9 dual-core | ARM Cortex-A9 quad-core |
| Maximum CPU Frequency | 1.0 GHz | 1.0 GHz | 1.0 GHz | 1.0 GHz | 850 MHz | 1.0 GHz |
| Automotive Qualified | Yes (AEC-Q100, -40C to +125C Tj) | Yes | Yes | Yes | Yes | No (consumer grade) |
| Silicon Revision | C (rev AC) | D (rev AD) | E (rev AE) | C (rev AC) | D (rev AD) | D (rev AD) |
| Memory Interface | DDR3 / LPDDR2, 64-bit | DDR3 / LPDDR2, 64-bit | DDR3 / LPDDR2, 64-bit | DDR3 / LPDDR2, 64-bit | DDR3 / LPDDR2, 64-bit | DDR3 / LPDDR2, 64-bit |
| Lifecycle Status | NRND | NRND | NRND | NRND | NRND | NRND |
主な差別化要因
- Quad-core Cortex-A9 at 1.0 GHz vs Dual-core 6Dual variants （vs MCIMX6D6AVT10AC)
- Latest silicon revision AE with updated errata fixes （vs MCIMX6Q6AVT10AD)
- Automotive-grade silicon qualified to +125C Tj （vs MCIMX6Q5AVT10AD)
設計ノート
The FCBGA-624 package relies on the PCB top-layer copper pour for heat dissipation. For automotive +125C Tj operation under continuous 1.0 GHz load, allocate a minimum 4x4 array of thermal vias under the die shadow, stitch the top GND pour across the package perimeter, and follow the NXP i.MX 6Quad Thermal Management AN. Use a thermal interface material (TIM) if a heatsink is mounted. Typical VCORE current at 1.0 GHz is around 1.2 A, so size the 1.1 V copper plane accordingly.
Use a 6+ layer PCB stack-up with dedicated GND and PWR planes adjacent to the top signal layer. Match the DDR3/LPDDR2 lengths per the i.MX 6Quad Hardware Design Guide (target within 25 ps skew on the byte lanes). Use 100 ohm differential impedance for USB, PCIe, SATA, and LVDS, and 90 ohm for HDMI. Escape the FCBGA-624's 0.8 mm pitch on an 0.4/0.6 mil trace/space HDI process with laser microvias.
Power the MCIMX6Q6AVT10AC through an NXP PCA9450A or PF3000 PMIC for proper rail sequencing (1.1 V VCORE, 1.5 V LVDDR, 1.8 V, 3.3 V). Decouple each VCORE ball with a 1 uF 0402 X7R ceramic placed within 1 mm of the ball, plus a 10 uF bulk on each rail. Avoid sharing the VCORE inductor between i.MX6 and the PMIC core - isolate the analog and digital grounds as recommended in the reference schematic.
Keep all high-speed differential pairs (USB, PCIe, SATA, HDMI, LVDS) length-matched within 150 mil of their respective clocks. Series-ac-cap the DSI/CSI lanes and route them on inner layers with continuous GND reference. Place boot mode resistors on the BOOT_CFG pins with 4.7K pull-ups to the proper rail so the boot source can be reconfigured in production.
Do not populate a non-automotive revision (suffix 5) into AEC-Q100 designs - the temperature grade and errata list differ. When migrating between mask sets AC, AD, and AE, re-validate HAB keys, USB PHY impedance, and DDR3 training values per the latest errata. The PCIMX6Q6AVT10AC preproduction MPN must never be used in volume production silicon.
コンプライアンス情報
AEC-Q100 qualified per NXP i.MX 6Quad datasheet. RoHS and REACH compliant. Lead-free and halogen-free per NXP material declaration. Conflict-mineral compliant per NXP supplier program.
