MPC866PZP133A - PowerQUICC 32-Bit MPU 133MHz | NXP 357-BGA
部品番号: MPC866PZP133A ⚠ ラストタイムバイ| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $108.21 | $108.21 |
| 10 | $95.5 | $955.00 |
| 100 | $78.2 | $7,820.00 |
| 500 | $62.4 | $31,200.00 |
| 1,000 | $51.9 | $51,900.00 |
MPC866PZP133A 概要
A microprocessor (MPU/MCU) is a single-chip processor that integrates a CPU core, memory, and peripherals to execute software and control connected hardware in embedded systems. The MPC866 family sits in the broader taxonomy of 32-bit embedded processors -> integrated communications controllers -> PowerQUICC family -> Power Architecture derivatives, serving networking and telecom applications where deterministic communications handling matters.
Key features include the PowerQUICC communications processor module (CPM), an integrated 10/100 Ethernet MAC, UARTs, an SPI, I2C, and HDLC/SDLC channels for protocol handling without burdening the core. The internal memory map supports up to 24 KB of internal SRAM, and the external bus can address SDRAM, Flash, and peripherals through a 32-bit data path. Operating temperature is 0 C to +95 C commercial grade.
The MPC866 architecture separates communications tasks from control-plane code via the CPM, freeing the 133 MHz core for real-time OS, routing tables, and application logic. Compared with its predecessor MPC860, the MPC866 is a 0.18 micron shrink that increases the maximum core frequency to 133 MHz, lowers core voltage to 1.8 V, and adds an integrated Ethernet MAC, reducing external component count on typical router/bridge designs.
Typical applications include SOHO routers, integrated access devices, ISDN terminal adapters, industrial control with Ethernet connectivity, and telecom bridging equipment. The combination of PowerPC core and on-chip peripherals makes it a classic fit for low-cost networking designs in the early-to-mid 2000s era that remain in production service today.
When designing with the MPC866PZP133A, ensure the core supply is regulated to 1.8 V with sufficient bulk decoupling, and provide proper PBGA-357 PCB land pattern with controlled-impedance traces on the external bus. Use the JTAG boundary-scan chain (per IEEE 1149.1) for board-level testability and consider the thermal envelope in enclosed industrial enclosures.
This page aggregates current distributor stock, validated drop-in pin-compatible alternatives, and design considerations not found in the original datasheet - giving engineers working on long-life cycle programs a single reference point.
ドロップイン代替品: MPC866PZP133A — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: MPC866PZP133A （同一形状・フットプリント） — 相違点: Operating Temperature, Package, Mounting Type, Number of Cores, Process Technology.
クイック比較ツール — 並列比較する代替部品を選択:
MPC866PVP133A
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MPC866PVR133A
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MPC866TZP133A
✅ ドロップイン✓ 在庫あり
$25.4 / 個
データシートを見る →MPC859PZP133A
✅ ドロップイン✓ 在庫あり
$55.4 / 個
データシートを見る →MPC859PVR133A
✅ ドロップイン✓ 在庫あり
$49.9 / 個
データシートを見る →MPC866PZP133A 最大定格＆電気的特性
| Series | PowerQUICC I (MPC866) |
| Core Architecture | MPC8xx (Power Architecture) |
| Core Bit Width | 32-bit |
| Number of Cores | 1 |
| Core Frequency | 133 MHz |
| External Bus Frequency | 66 MHz |
| Process Technology | 0.18 micron |
| Core Supply Voltage | 1.8 V |
| I/O Supply Voltage | 3.3 V (5 V TTL tolerant) |
| パッケージ | 357-PBGA (Plastic Ball Grid Array) 25x25 mm |
| 動作温度 | 0 C to +95 C |
| 実装タイプ | Surface Mount |
| Communication Features | 10/100 Ethernet MAC, HDLC/SDLC, UART, SPI, I2C |
| Compliance | RoHS status depends on variant (verify with NXP PCN) |
| Lifecycle | End-of-Life / Last-Time-Buy (per NXP product discontinuance notice) |
MPC866PZP133A 357-pbga (plastic ball grid array) 25x25 mm ピン配置ガイド
MPC866PZP133A (357-pbga (plastic ball grid array) 25x25 mm パッケージ) のピン配置。 このデジタルICには、GPIO、通信インターフェース (UART、SPI、I2C)、および電源ピンが含まれています。代替ピン機能と設定オプションについては、メーカーのデータシートを参照してください。組み込みシステム設計とPCBレイアウトに不可欠です。
詳細なピン配置データはありません: MPC866PZP133A.
詳細は データシート をご参照ください。
主な用途
MPC866PZP133A の用途: 6 件s: SOHO Router / Integrated Access Device, ISDN Terminal Adapter / Bridge, Industrial Ethernet Gateway, VoIP Edge Router (legacy production), Set-Top Box / Embedded Media Bridge, Long-Life Industrial Service Repair Stock.
SOHO Router / Integrated Access Device
The MPC866PZP133A's integrated 10/100 Ethernet MAC plus HDLC/SDLC channels make it a classic fit for SOHO router and IAD designs where one chip must terminate an xDSL or T1/E1 link and serve a small Ethernet LAN. The 133 MHz Power Architecture core runs the routing/PPP stack while the offloaded CPM handles DMA across the WAN side. Compared with an MCU-plus-external-controller architecture, the MPC866PZP133A removes an external Ethernet MAC and serial IC, reducing BOM cost by $5-$10 per board in volume production.
おすすめ
ISDN Terminal Adapter / Bridge
ISDN terminal adapters need glue-free HDLC handling for the BRI/U-interface side and a CPU for protocol stack termination - exactly what the MPC866PZP133A's CPM provides at 133 MHz. The 1.8 V core keeps thermal dissipation low in plastic-housed consumer CPE, while the 3.3 V I/O interfaces directly to legacy 5 V TTL line drivers. Designers benefit from NXP's reference firmware and the proven PowerQUICC driver stacks, which remained in production for decades across European telecom deployments.
おすすめ
Industrial Ethernet Gateway
Industrial control gateways require deterministic Ethernet performance plus serial legacy buses (RS-232/485) for older PLC and sensor networks. The MPC866PZP133A's CPM offloads the Ethernet stack while the core runs Modbus TCP or EtherNet/IP gateway logic, with on-chip UARTs driving multiple serial ports without external bridge ICs. The 0-95 C commercial temperature range suits most indoor industrial enclosures; design houses needing industrial-grade temperature choose the equivalent -40 to +85 C variant.
おすすめ
VoIP Edge Router (legacy production)
VoIP edge routers and media gateways from the 2000-2012 era used the MPC866PZP133A to handle HDLC-based TDM trunks plus packet-side DSP control. The 133 MHz core can run uClinux or VxWorks for SIP/H.323 protocol stacks, while the CPM delivers T1/E1 framing with sub-microsecond latency. Repair depots and aftermarket service channels still require these chips for legacy telecom hardware - driving the EOL last-time-buy activity visible on distributor product pages as of 2026-10-16.
おすすめ
Set-Top Box / Embedded Media Bridge
Early-to-mid 2000s set-top boxes deployed the MPC866PZP133A as a main controller, using the Ethernet MAC for IP-STB network connectivity while the core ran the navigation stack and the CPM handled serial control of tuner ICs. Although newer SoCs replaced this role in volume STBs, the chip remains in service-equipment refresh programs and small-run industrial media devices where long-life-cycle components are mandatory for re-certification pathways.
おすすめ
Long-Life Industrial Service Repair Stock
Beyond greenfield designs, the MPC866PZP133A's primary role in 2026 is repair stock for industrial machines, military communications equipment, and telecom infrastructure with decades-long service lives. Distributor allocation pricing reflects this scarcity: $108 per single unit in 2026-10 data. The 357-PBGA package is mature enough that machine-vision rework is straightforward, making the part widely supported by contract manufacturers' long-life-cycle procurement programs in aerospace and defense aftermarket channels.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: MPC866PZP133A — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | MPC866PVP133A | MPC866PVR133A | MPC866TZP133A | MPC859PZP133A |
|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | 357-PBGA (25x25 mm) | 357-PBGA (25x25 mm) - same | 357-PBGA (25x25 mm) - same | 357-PBGA (25x25 mm) - same | 357-PBGA (25x25 mm) - same |
| Core Frequency | 133 MHz | 133 MHz | 133 MHz | 133 MHz | 133 MHz |
| Core Architecture | MPC8xx (32-bit) | MPC8xx (32-bit) | MPC8xx (32-bit) | MPC8xx (32-bit) | MPC8xx (32-bit) |
| Core Supply Voltage | 1.8 V | 1.8 V | 1.8 V | 1.8 V | 1.8 V |
| I/O Supply Voltage | 3.3 V (5 V TTL tolerant) | 3.3 V (5 V TTL tolerant) | 3.3 V (5 V TTL tolerant) | 3.3 V (5 V TTL tolerant) | 3.3 V (5 V TTL tolerant) |
| Process Node | 0.18 micron | 0.18 micron | 0.18 micron | 0.18 micron | 0.18 micron |
| Lifecycle Status | Last Time Buy | Last Time Buy | Last Time Buy | Last Time Buy | Last Time Buy |
主な差別化要因
- 0.18 micron process at 133 MHz vs older 0.29 micron MPC860 （vs MPC860DTZQ50D4 (50 MHz, 0.29 micron))
- Integrated 10/100 Ethernet MAC reduces BoM cost （vs MPC860 + external Ethernet MAC (e.g. MC68160))
- 5 V TTL tolerant I/O simplifies legacy interfaces （vs Pure 3.3 V MCUs (no 5 V tolerance))
設計ノート
The MPC866PZP133A requires a sequenced 1.8 V core supply ramped in conjunction with the 3.3 V I/O supply to prevent internal latch-up. Place at least 22 uF of bulk decoupling near each supply ball cluster, and 0.1 uF ceramic bypass caps close to the package. According to the NXP datasheet, the core current consumption at 133 MHz is approximately 700 mA under typical workloads - verify your DC-DC converter's 1.8 V output current rating with 25% headroom.
The 357-PBGA package has a junction-to-ambient thermal resistance (theta_JA) of approximately 12 C/W with proper PCB thermal-via array under the center balls. Estimated: at 1.4 W typical core dissipation and 70 C ambient, the junction temperature reaches 1.4 W * 12 C/W + 70 C = 86.8 C, within the 95 C commercial limit. For closed industrial enclosures, derate by reducing ambient by 10 C or add a small aluminum heatsink bonded to the package top with thermal pad.
Use controlled-impedance traces (50 ohm single-ended / 100 ohm differential) for the external bus and Ethernet MII/GMII signals. Route the 66 MHz external bus with length matching within +/- 0.5 mm across address and data groups to prevent timing violations. Per the NXP MPC866 hardware design guide, power-plane cuts should be avoided under the 357-ball PBGA footprint to maintain a continuous ground reference.
Do not assume the MPC866PZP133A and MPC866PVR133A have identical peripheral counts - always verify Ethernet MAC quantity and HDLC channel count against your firmware's initialization tables before swap. The ZP suffix variants have a specific peripheral configuration; mis-substitution can produce silent board-level failures that only manifest under load. Cross-reference the device's PVR (Processor Version Register) value at boot to confirm correct part.
コンプライアンス情報
Compliance status depends on date code and distributor stock; older reels from 2005-2015 may be leaded (SnPb) while newer NXP-stocked parts comply with RoHS Directive 2011/65/EU. Verify with manufacturer CoC (Certificate of Compliance) before integrating into CE-marked end products.
