PI3543-00-LGIZ - 10A 60V ZVS Buck SiP Regulator | Vicor
部品番号: PI3543-00-LGIZ ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $19.87 | $19.87 |
| 10 | $18.42 | $184.20 |
| 100 | $16.05 | $1,605.00 |
| 500 | $13.92 | $6,960.00 |
| 1,000 | $12.18 | $12,180.00 |
PI3543-00-LGIZ 概要
A buck regulator (step-down switching converter) is a switched-mode power supply topology that converts a higher DC input voltage to a lower DC output voltage using an inductor, a switch, and synchronous rectification. ZVS (Zero-Voltage-Switching) is a soft-switching technique where the MOSFET is turned on only when the drain-to-source voltage has reached zero, dramatically reducing switching losses and EMI. The buck regulator sits within the power-management IC hierarchy: switching regulator > DC-DC converter > power management IC > semiconductor.
Key features include an industry-leading power density for the 10 A class (>200 W/in³ in the SiP), high efficiency across line and load, an enable pin for power sequencing, and monotonic startup into pre-biased loads. The integration removes the need for an external MOSFET selection, gate drivers, and most support passives, simplifying design-in and reducing PCB area. Built-in protection features include over-current, over-temperature, over-voltage, and under-voltage lockout.
Typical applications include 48 V telecom point-of-load conversion, industrial 48 V bus rails, distributed power architectures feeding downstream POL converters, LED driver current sources, and high-current point-of-load rails for FPGAs, ASICs, and processors in computing and communications equipment. The wide 36 V-60 V input range tolerates transients on 48 V backplanes and telecom battery plants.
When designing with the PI3543-00-LGIZ, follow Vicor's land-pattern and thermal recommendations precisely: the SiP exposes a large thermal pad that requires adequate copper area to keep junction temperature within ratings. Note that the LGIZ package uses land-grid-array solder bumps and is NOT pin-compatible with non-Vicor DC-DC modules – any alternative must come from the Vicor PI354x family. Always confirm loop stability with the recommended output LC network and respect the derating curves in the datasheet.
This page synthesises distributor pricing, family-internal cross references, and practical layout notes for engineers selecting the PI3543-00-LGIZ in 48 V distributed-power designs.
ドロップイン代替品: PI3543-00-LGIZ — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: PI3543-00-LGIZ （同一形状・フットプリント） — 相違点: Protection Features, RoHS Status, Synchronous Rectifier, Topology.
クイック比較ツール — 並列比較する代替部品を選択:
PI3542-00-LGIZ
✅ ドロップイン✓ 在庫あり
$16.1 / 個
データシートを見る →PI3540-00-LGIZ
✅ ドロップイン📋 参考代替品（カタログ未掲載）
PI3545-00-LGIZ
✅ ドロップイン📋 参考代替品（カタログ未掲載）
PI3546-00-LGIZ
✅ ドロップイン📋 参考代替品（カタログ未掲載）
PI3543-00-LGAIZ
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
PI3543-00-LGIZ 最大定格＆電気的特性
| トポロジー | ZVS Buck (synchronous step-down) |
| 入力電圧範囲 | 36 V to 60 V |
| Output Voltage (Fixed) | 3.3 V |
| Output Voltage (Adjusted) | 2.6 V (minimum) |
| 最大出力電流 | 10 A |
| 出力タイプ | Adjustable (Fixed 3.3 V default) |
| パッケージ / ケース | 85-BLGA Module (10 mm x 10 mm SiP) |
| 実装タイプ | Surface Mount |
| 動作温度 | -40 C to +125 C (junction) |
| 出力数 | 1 |
| 同期整流器 | Yes (integrated) |
| Protection Features | OCP, OVP, OTP, UVLO |
| イネーブルピン | Yes |
| RoHS ステータス | Compliant |
| Series | Cool-Power PI354x |
PI3543-00-LGIZ ピン構成
| ピン 1 | VIN — Positive input voltage (36 V to 60 V) |
| ピン 2 | GND — Power ground return |
| ピン 3 | EN — Enable pin (active high) |
| ピン 4 | VOUT — Regulated output (3.3 V default) |
| ピン 5 | FB — Feedback node for VOUT adjustment |
| ピン 6 | PGND — Power ground for high-current return |
| ピン 7 | PG — Power good indicator |
| ピン 8 | TRK — Track / SS pin for soft-start |
| ピン 9 | NC — Not connected (per datasheet) |
| ピン 10 | NC — Not connected (per datasheet) |
主な用途
PI3543-00-LGIZ の用途: 6 件s: 48 V Telecom Point-of-Load Conversion, Industrial 48 V Bus Power Rails, Distributed Power Architecture Feed Stage, High-Current FPGA / ASIC POL Rail, LED Driver Current Source, Computing and Server 48 V to 3.3 V Rail.
48 V Telecom Point-of-Load Conversion
The PI3543-00-LGIZ accepts the standard 48 V telecom battery-plant rail (36 V to 60 V input range) and steps it down to 3.3 V at up to 10 A. Its ZVS topology sustains high efficiency at the large step-down ratio typical of 48 V to 3.3 V conversion, where hard-switched bucks suffer severe switching loss. The SiP integrates the controller and power MOSFETs, eliminating the need for a discrete high-side switch and freeing PCB area for the downstream POL converters. Use the PI3543 to feed DSPs, FPGAs, and ASICs that require a stiff 3.3 V rail in telecom line cards and baseband units.
おすすめ
Industrial 48 V Bus Power Rails
Industrial automation backplanes often distribute a 48 V bus that the PI3543-00-LGIZ can convert directly to 3.3 V at 10 A. ZVS switching keeps EMI low, which matters in factory-floor environments with motor drives and switching inverters coupling noise onto the bus. The 85-BLGA SiP's high power density allows the converter to sit immediately adjacent to its load on the backplane PCB, minimising distribution losses. Built-in OCP, OVP, OTP, and UVLO protect the rail against the transients and fault conditions common in industrial plants.
おすすめ
Distributed Power Architecture Feed Stage
In distributed power architectures, an intermediate bus converter (IBC) steps 48 V down to an intermediate voltage that downstream POL converters further regulate. The PI3543-00-LGIZ at 3.3 V / 10 A is well suited as the intermediate stage feeding a bank of downstream buck converters, ASICs, and DSP cores. Its high efficiency (>90% across line and load per Vicor) preserves overall system efficiency. The integrated SiP simplifies the IBC stage to a single IC plus a small LC output filter, accelerating time-to-market for high-current rails in computing and networking hardware.
おすすめ
High-Current FPGA / ASIC POL Rail
Modern FPGAs and ASICs draw tens of amps at low core voltages. The PI3543-00-LGIZ at 10 A continuous output is ideal as a dedicated 3.3 V auxiliary rail or as one of several parallel-fed rails for high-current ASICs. The ZVS topology minimises high-frequency noise on the output, easing EMC compliance for the surrounding digital circuitry. The small 10x10 mm SiP footprint lets the converter sit adjacent to the load, minimising PCB trace inductance and improving transient response to large load steps typical of FPGA power profiles.
おすすめ
LED Driver Current Source
The PI3543-00-LGIZ evaluation board variant (PI3543-00-EVAL1) is explicitly designed as an LED driver, and the part itself supports constant-current operation via a sense resistor. Driving high-brightness LED arrays from a 48 V bus becomes a matter of configuring the output current setpoint. ZVS switching avoids audible noise and high-frequency EMI that would otherwise interfere with lighting control circuits. The integrated SiP keeps the LED driver footprint small enough to embed inside architectural and industrial luminaires powered from 48 V PoE or industrial bus rails.
おすすめ
Computing and Server 48 V to 3.3 V Rail
Hyperscale data centres are migrating from 12 V to 48 V distribution to reduce I²R losses, and the PI3543-00-LGIZ steps a 48 V rack rail down to a 3.3 V intermediate or POL rail at 10 A. ZVS efficiency preserves the energy-savings benefit of moving to 48 V, while the small 10x10 mm SiP footprint allows many paralleled converters to feed high-current server SoCs and memory. The part's enable pin and monotonic prebias startup simplify multi-rail sequencing required by modern server SoCs. The 36-60 V input range tolerates the transients seen on 48 V rack buses during load steps.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: PI3543-00-LGIZ — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | PI3542-00-LGIZ | PI3540-00-LGIZ | PI3545-00-LGIZ | PI3546-00-LGIZ | PI3543-00-LGAIZ |
|---|---|---|---|---|---|---|
| Brand | Vicor | Vicor | Vicor | Vicor | Vicor | Vicor |
| Package | 85-BLGA SiP 10x10 mm | 85-BLGA SiP 10x10 mm - same | 85-BLGA SiP 10x10 mm - same | 85-BLGA SiP 10x10 mm - same | 85-BLGA SiP 10x10 mm - same | 85-BLGA SiP 10x10 mm - same |
| Input Voltage Range | 36 V to 60 V | 36 V to 60 V | 36 V to 60 V | 36 V to 60 V | 36 V to 60 V | 36 V to 60 V |
| Maximum Output Current | 10 A | 10 A | 10 A | 10 A | 10 A | 10 A |
| Topology | ZVS Buck | ZVS Buck | ZVS Buck | ZVS Buck | ZVS Buck | ZVS Buck |
| Pin-to-Pin Compatible | Yes (reference) | Yes | Yes | Yes | Yes | Yes |
主な差別化要因
- High-density SiP integrates controller and power switches （vs Discrete 48 V to 3.3 V / 10 A buck (e.g. TI TPS54360 + external MOSFET))
- ZVS soft-switching at high step-down ratios （vs Hard-switched buck at 48 V to 3.3 V (e.g. LM5116))
- Wide 36 V to 60 V input tolerates 48 V transients （vs Narrower-input POL converters (e.g. 30 V max))
設計ノート
Estimated: at VIN=48 V, VOUT=3.3 V and IOUT=10 A the converter dissipates roughly 14 W assuming ~90% efficiency. The 85-BLGA 10x10 mm SiP exposes a large thermal pad that MUST be soldered to a multi-layer PCB copper pour (Vicor suggests >= 4 sq.in. of 2 oz copper on inner and outer layers) to keep junction temperature within the -40 C to +125 C operating range. A insufficient thermal pad is the #1 cause of field failures in SiP regulators.
Use the exact land pattern from the Vicor PI3543-00-LGIZ datasheet. The 85-ball BLGA requires NSMD (non-solder-mask-defined) pads with the diameters and pitches specified; deviating from the datasheet pattern risks opens or solder-bridge shorts during reflow. Place the input ceramic bypass capacitors as close as possible to the VIN balls and use multiple vias to tie the PGND thermal pad to internal ground planes for both electrical return and thermal conduction.
Estimated: the output LC filter (typically 1-2 uH inductor plus 47-100 uF ceramic + electrolytic bulk) should be placed within 5-10 mm of the VOUT balls to minimise the high-frequency switching loop. Keep the FB (feedback) trace short and away from noisy switching nodes; route it on an inner layer with a ground pour below. The EN and PG pins are low-current logic signals and should be kept short and clean. Respect the keep-out zones in the datasheet when laying out a copper pour under the SiP body.
Common pitfalls: (1) applying an input voltage above 60 V destroys the part - always include upstream TVS / fuse protection on the 48 V rail. (2) Exceeding 10 A continuous load without adequate thermal design triggers OTP shutdown. (3) Substituting a generic BGA land-pattern for the Vicor SiP footprint leads to solder-joint reliability problems; always use the Vicor footprint. (4) Adjusting VOUT below the supported 2.6 V minimum risks loss of regulation. (5) Omitting the recommended soft-start capacitor on TRK can cause inrush currents that trip upstream protection.
コンプライアンス情報
RoHS compliant per Vicor product listing. AEC-Q100 not applicable - this is a commercial/industrial-grade power module, not automotive qualified.
