PI3754-00-LGIZ - Wide-Input ZVS Buck Regulator SiP | Vicor
部品番号: PI3754-00-LGIZ ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $22.5 | $22.50 |
| 10 | $20.8 | $208.00 |
| 100 | $19.2 | $1,920.00 |
| 500 | $17.85 | $8,925.00 |
| 1,000 | $16.9 | $16,900.00 |
PI3754-00-LGIZ 概要
A buck regulator is a switched-mode DC-DC converter that steps a higher DC input voltage down to a lower regulated DC output voltage. Buck regulators sit within the broader power-management hierarchy: switching regulator -> DC-DC converter -> power management IC -> semiconductor. ZVS (Zero-Voltage Switching) is a soft-switching technique that switches the high-side MOSFET when its drain-to-source voltage is approximately zero volts, dramatically reducing switching losses and EMI compared with hard-switched PWM converters. The PI3740/PI3754 family uses this ZVS topology to deliver high efficiency across the entire load range.
Key features include a wide 8 V to 60 V input voltage range, a 24 V nominal output that can be adjusted downward with an external resistor divider, switching frequencies in the MHz range for small passive components, and parallel capability with single-wire current sharing for higher-power rails. The SiP integration eliminates parasitic inductance between the controller and the power FETs, allowing clean switching edges and reducing PCB real-estate. The LGA module also exposes the thermal pad to internal copper heat-spreading, supporting high continuous power without external heatsinks in many applications.
Typical applications include 48 V telecom point-of-load conversion, industrial 24 V bus regulation, battery-powered equipment requiring a regulated intermediate rail, and distributed power architectures where high-density SiPs simplify board layout. Compared with discrete buck designs, the PI3740/PI3754 family reduces BOM count, shrinks solution size, and shortens design time.
When designing with the PI3754-00-LGIZ, follow Vicor's recommended analog / power / ground layout partitioning from the datasheet to maintain noise isolation between the sensitive analog feedback path and the high-di/dt power loop. Decouple the input with low-ESL/ESR ceramic capacitors placed as close as possible to the VIN pins, and respect the minimum output capacitance specified for control-loop stability.
This page synthesizes distributor pricing, drop-in Vicor-family alternatives, and practical layout guidance not all collected in one place on the manufacturer datasheet, giving engineers a faster path from selection to prototype.
ドロップイン代替品: PI3754-00-LGIZ — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: PI3754-00-LGIZ （同一形状・フットプリント） — 相違点: Maximum Output Power, Mounting Type, Package Type, Topology.
クイック比較ツール — 並列比較する代替部品を選択:
PI3740-00-LGIZ
✅ ドロップイン📋 参考代替品（カタログ未掲載）
PI3749-00-LGIZ
✅ ドロップイン📋 参考代替品（カタログ未掲載）
PI3754-00-LGIZR
✅ ドロップイン📋 参考代替品（カタログ未掲載）
PI3754-00-LGIZ 最大定格＆電気的特性
| トポロジー | ZVS Buck (zero-voltage switching) |
| Package Type | System-in-Package (SiP) LGA module (LGIZ) |
| 入力電圧範囲 | 8 V to 60 V |
| Nominal Output Voltage | 24 V (adjustable via external resistor divider) |
| Maximum Output Power | 60 W |
| 出力タイプ | Adjustable |
| 出力数 | 1 |
| Control Mode | Voltage-mode / current-mode (per retrieved summary) |
| Parallel Operation | Supported, single-wire current sharing |
| Soft Switching | ZVS (Zero-Voltage Switching) |
| Integration Level | Controller + power switches + passives integrated |
| 実装タイプ | Surface Mount (LGA land grid array) |
| 動作温度範囲 | -40 C to +115 C |
| Package Height | 2.56 mm |
PI3754-00-LGIZ 2.56 mm ピン配置ガイド
PI3754-00-LGIZ (2.56 mm パッケージ) のピン配置。 このパワーデバイスは、ゲート、ドレイン、ソース端子を備えています。非極性パッケージの場合、正確なピン1の向きとフットプリントの詳細については、メーカーのデータシートを参照してください。主な用途には、電源設計、モータ駆動、負荷スイッチングがあります。
詳細なピン配置データはありません: PI3754-00-LGIZ.
詳細は データシート をご参照ください。
主な用途
PI3754-00-LGIZ の用途: 6 件s: 48 V Telecom Point-of-Load Conversion, Industrial 24 V Bus Regulation, Battery-Powered Equipment Intermediate Rails, Distributed Power Architecture Front-End, LED Lighting and High-Current Driver Rails, Test and Measurement Equipment Power.
48 V Telecom Point-of-Load Conversion
Step a 48 V telecom backplane rail down to a regulated 24 V (or externally programmed lower voltage) for downstream POL converters. The PI3754-00-LGIZ's 8 V to 60 V input window accommodates nominal 48 V rails with under-voltage and surge transients, and its ZVS topology maintains high efficiency across the load - critical for telecom hardware where every watt of conversion loss adds to cooling cost. The integrated SiP shrinks the power section versus a discrete buck, freeing board area for DSP and SerDes circuitry while Vicor's single-wire current-share support lets designers parallel two units for higher-power POL rails.
おすすめ
Industrial 24 V Bus Regulation
Condition factory-floor 24 V industrial bus power into a clean, isolated-or-non-isolated intermediate rail for motor drives, PLC I/O, and sensor signal chains. The PI3754-00-LGIZ tolerates 24 V nominal inputs that swing 8 V to 60 V during load-dump and brown-out events, while ZVS switching reduces conducted and radiated EMI - important where the same enclosure hosts sensitive analog front-ends. Vicor's datasheet typical applications list explicitly names industrial 24 V distribution, and the SiP's -40 C to +115 C rating covers unconditioned control cabinets.
おすすめ
Battery-Powered Equipment Intermediate Rails
Generate a regulated intermediate bus (commonly 24 V or 12 V) from multi-cell battery stacks whose voltage swings widely as cells discharge. The PI3754-00-LGIZ accepts 8 V to 60 V input, handling battery packs from 6S Li-ion up to 12S or lead-acid 48 V systems. ZVS switching keeps light-load efficiency high - extending battery runtime in portable or mobile applications - while the single-wire current-share bus lets two SiPs share load for higher surge capability during motor or RF transmission events.
おすすめ
Distributed Power Architecture Front-End
Replace an isolated front-end converter with a Vicor PI3754-00-LGIZ fed from a 48 V or 24 V bus, using the part's high-density SiP to deliver 60 W of intermediate-bus power. Per the Vicor datasheet, this architecture reduces component count, lowers BOM cost in high-volume assembly, and accelerates time-to-market compared with discrete designs. Where multiple downstream rails at differing voltages are needed, place a PI3754 near each load zone; current-share between two units if a zone demands more than 60 W.
おすすめ
LED Lighting and High-Current Driver Rails
Use the PI3754-00-LGIZ to drive high-brightness LED arrays from 24 V or 48 V bus power with high-frequency PWM dimming downstream. The 60 W output supports long LED strings with constant-current driver stages at the load, and ZVS soft-switching prevents audible switching noise - common in film and stage lighting that demands silent operation. The Vicor SiP's tight thermal envelope and integrated heat-spreading pad simplify mechanical integration into compact luminaire housings.
おすすめ
Test and Measurement Equipment Power
Power instruments such as bench supplies, data-acquisition front-ends, and signal generators from a wide-input source that may include battery, AC-adapter rectified DC, or bench DC rails. The PI3754-00-LGIZ's 8 V to 60 V input and high-efficiency ZVS conversion provide clean, regulated rails with minimal EMI leakage into sensitive analog measurement paths. Parallel current-share lets designers scale a single PI3754 design to higher power without redesigning the control loop.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: PI3754-00-LGIZ — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | PI3740-00-LGIZ | PI3749-00-LGIZ | PI3754-00-LGIZR |
|---|---|---|---|---|
| Brand | Vicor | Vicor | Vicor | Vicor |
| Package | LGA SiP (LGIZ) | LGA SiP (LGIZ) | 108-BLGA Module (LGA SiP) | LGA SiP (LGIZ) |
| Topology | ZVS Buck | ZVS Buck-Boost | ZVS Buck | ZVS Buck |
| Input Voltage Range | 8 V to 60 V | 8 V to 60 V | 8 V to 60 V | 8 V to 60 V |
主な差別化要因
- ZVS soft-switching versus standard hard-switched buck （vs Generic 60 W buck regulator from other vendors)
- System-in-Package integration reduces BOM and solution size （vs Discrete buck controller + external FETs + driver)
- Single-wire current share for parallel operation （vs Buck regulators without built-in current sharing)
設計ノート
Per the Vicor PI3740-00 family datasheet, partition the PCB into distinct analog and power zones separated by a ground-return gap to minimize noise coupling from the high-di/dt power loop into the sensitive feedback/compensation path. Keep the input ceramic capacitors within 2-3 mm of the VIN pins and use vias directly under the LGA thermal pad to spread heat into inner copper layers. Estimated: at 60 W output with 95 percent efficiency, power dissipation is ~3.2 W; a 4-layer board with a 25 x 25 mm copper zone keeps junction rise within the datasheet's thermal derating curve. Always cross-check the exact thermal data from the Vicor datasheet's SOA section.
Estimated: at VIN=48 V, VOUT=24 V, IOUT=2.5 A (60 W), per the PI3740-00 family architecture the converter dissipates roughly 3 W at typical efficiency; with the LGA SiP's thermal resistance to the PCB pad this translates to a 30-40 C junction rise over a 4-layer board thermal pad. Provide at least 25 x 25 mm of 2 oz copper on top and inner layers, stitched with a thermal via array, and avoid placing heat-generating components directly above the SiP. Always verify with the thermal derating curves in the Vicor datasheet and conduct bench measurement.
Use low-ESL/ESR ceramic capacitors (X7R or better) for both the input bulk and the high-frequency bypass near VIN. Per Vicor's design guidance for the PI3740-00 family, observe the minimum output capacitance required for control-loop stability - omitting it can cause subharmonic oscillations at high load steps. If output ripple must be minimized further, add an LC post-filter sized to attenuate the switching node ripple to within the downstream load's tolerance.
Do not hot-plug the input without a controlled pre-charge circuit - the SiP's input bulk capacitance can draw peak currents that damage upstream bus rails or backplane connectors. Per the Vicor datasheet, follow the recommended inrush-control circuit and never exceed the absolute maximum input voltage of 60 V. Also avoid routing digital switching signals across the SiP's analog zone; noise injection into the feedback node can manifest as output voltage jitter.
コンプライアンス情報
Compliance statements (RoHS, REACH, lead-free, halogen-free) were not explicitly stated in the retrieved data and are marked 'unknown' per Data Authenticity Rules; verify with Vicor's product compliance documentation before volume order. AEC-Q100 is not applicable for industrial-grade DC-DC SiPs.
