PIC32MX130F064C-V/TL - 64KB Flash 32-bit MCU 40MHz | Microchip
部品番号: PIC32MX130F064C-V/TL ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $3.42 | $3.42 |
| 10 | $3.07 | $30.70 |
| 100 | $2.61 | $261.00 |
| 500 | $2.21 | $1,105.00 |
| 1,000 | $1.95 | $1,950.00 |
| 3,000 | $1.78 | $5,340.00 |
PIC32MX130F064C-V/TL 概要
A microcontroller (MCU) is a single-chip computer that integrates a CPU core, non-volatile program memory (Flash), volatile data memory (SRAM), and a rich set of peripherals such as timers, communication controllers, ADCs, and I/O pins. Within the broader taxonomy of semiconductors, MCUs sit below microprocessors (which require external memory) and above simple logic ICs. The PIC32 family is Microchip's 32-bit extension of the well-known PIC architecture, targeting applications that outgrow 8-bit PIC16/PIC18 or 16-bit PIC24/dsPIC parts but still benefit from Microchip's MPLAB X toolchain and peripheral library ecosystem.
Key features include 21 general-purpose I/O pins with Peripheral Pin Select (PPS), dual UART, dual SPI, dual I2C, dual I2S interfaces, a 10-channel 10-bit ADC, a Real-Time Clock and Calendar (RTCC), a Charge Time Measurement Unit (CTMU) for capacitive touch, and a separate PLL for the USB 2.0 full-speed controller. The device operates from 2.3V to 3.6V and supports in-circuit and in-application programming via 4-wire JTAG.
Architecturally, the PIC32MX130 uses a 5-stage pipeline MIPS32 M4K core with hardware multiply/divide and a single-cycle Flash fetch system that lets most instructions execute in one cycle. The MIPS ISA offers higher code density than ARM Cortex-M for similar workloads, and Microchip's Harmony and MPLAB XC32 toolchains support C/C++ development. The CTMU and PPS subsystems make the part flexible for mixed-signal and pin-constrained designs.
Typical applications include industrial automation controllers, automotive body and infotainment subsystems, USB peripherals, consumer appliances with capacitive touch, IoT sensor hubs, and medical monitoring devices. The wide 2.3V to 3.6V supply range and 21 I/O pins are particularly attractive for sensor-rich nodes.
When designing with this part, evaluate whether the 50 MHz -50V speed grade (PIC32MX130F064C-50V/TL) is needed - it shares the same die and pinout but offers 25% more CPU headroom. Also plan for the exposed-pad requirement: the EP must be soldered to a properly sized copper pad for thermal and electrical grounding.
This page synthesizes Microchip datasheet specifications, distributor pricing as of 2026-10-01, drop-in pin-compatible alternatives, and practical design notes that go beyond the datasheet's typical-application section.
ドロップイン代替品: PIC32MX130F064C-V/TL — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: PIC32MX130F064C-V/TL （同一形状・フットプリント） — 相違点: ADC, DMA Channels, Operating Temperature, Program Memory (Flash), Package / Case.
クイック比較ツール — 並列比較する代替部品を選択:
PIC32MX130F064CT-I/TL
✅ ドロップイン✓ 在庫あり
$3.2 / 個
データシートを見る →PIC32MX130F064C-I/TL
✅ ドロップイン✓ 在庫あり
$1.82 / 個
データシートを見る →PIC32MX130F064C-50V/TL
✅ ドロップイン📋 参考代替品（カタログ未掲載）
PIC32MX130F064C-V/TL
✅ ドロップイン✓ 在庫あり
$1.78 / 個
データシートを見る →PIC32MX130F064C-V/TL 最大定格＆電気的特性
| Core Architecture | MIPS32 M4K |
| データバス幅 | 32-bit |
| Program Memory (Flash) | 64 KB (64K x 8) |
| RAM Size | 16 KB (16K x 8) |
| Maximum CPU Clock | 40 MHz |
| パッケージ / ケース | 36-VTLA (HVQCCN) Exposed Pad, 6x6 mm |
| Number of I/O Pins | 21 |
| Supply Voltage (VDD) | 2.3 V to 3.6 V |
| Operating Temperature (V grade) | -40 C to +105 C |
| UART Modules | 2 |
| SPI Modules | 2 |
| I2C Modules | 2 |
| I2S Modules | 2 |
| ADC | 10-channel, 10-bit |
| USB | USB 2.0 Full-Speed (Device/Host/OTG) |
| RTCC (Real-Time Clock) | Yes |
| CTMU | Yes |
| DMA Channels | Up to 4 channels |
| Programming Interface | ICSP, JTAG (4-wire) |
| AEC-Q100 | Yes (Automotive grade) |
| RoHS | Compliant |
| 実装タイプ | Surface Mount |
| Packaging | Tape & Reel (/TL) |
PIC32MX130F064C-V/TL 36-vtla (hvqccn) exposed pad, 6x6 mm ピン配置ガイド
PIC32MX130F064C-V/TL (36-vtla (hvqccn) exposed pad, 6x6 mm パッケージ) のピン配置。 このデジタルICには、GPIO、通信インターフェース (UART、SPI、I2C)、および電源ピンが含まれています。代替ピン機能と設定オプションについては、メーカーのデータシートを参照してください。組み込みシステム設計とPCBレイアウトに不可欠です。
詳細なピン配置データはありません: PIC32MX130F064C-V/TL.
詳細は データシート をご参照ください。
主な用途
PIC32MX130F064C-V/TL の用途: 6 件s: Industrial Automation Controller, USB Human Interface Device, Automotive Body Electronics, Consumer Appliance with Capacitive Touch, IoT Sensor Hub / Edge Node, Medical Monitoring Device.
Industrial Automation Controller
The PIC32MX130F064C-V/TL's 64 KB Flash and 16 KB SRAM are well-matched to industrial PLC and HMI sub-controllers running Microchip's MPLAB Harmony or legacy MLA stacks. The 40 MHz MIPS M4K core executes one instruction per cycle, giving 40 DMIPS of throughput - enough for Modbus RTU/TCP, simple PID loops, and capacitive touch UI. Dual UART, dual SPI, and dual I2C let the part simultaneously drive an RS-485 fieldbus, an SPI sensor, and an I2C EEPROM. The V range -40C to +105C tolerance survives unconditioned cabinet environments, and AEC-Q100 qualification opens the door to factory-floor automotive lines.
おすすめ
USB Human Interface Device
The integrated USB 2.0 full-speed controller with on-chip transceiver makes PIC32MX130F064C-V/TL ideal for low-cost USB HID peripherals such as keyboards, mice, and custom input panels. The separate USB PLL allows the CPU and USB clocks to operate independently, simplifying 48 MHz USB signaling while the CPU runs at 40 MHz. With 64 KB Flash the device comfortably holds the Microchip USB stack plus application firmware, and 21 I/O pins support sufficient key-matrix scanning. The 36-VTLA 6x6 mm package fits into compact dongle form factors.
おすすめ
Automotive Body Electronics
AEC-Q100 qualification combined with the V-grade -40C to +105C temperature range makes PIC32MX130F064C-V/TL a strong fit for body controllers, HVAC panels, seat-position memory, lighting modules, and mirror adjusters. Dual CAN is not present on the 130 family but dual LIN is achievable via UART plus a LIN transceiver, while UART/SPI/I2C handle local mirror sensors and LED drivers. The 64 KB Flash and 16 KB RAM are well-matched to these real-time, low-bandwidth tasks. Compact VTLA-36 6x6 mm footprint eases under-dash PCB placement.
おすすめ
Consumer Appliance with Capacitive Touch
The integrated Charge Time Measurement Unit (CTMU) enables robust capacitive touch sensing on PIC32MX130F064C-V/TL for kitchen appliances, induction hobs, and white-goods user interfaces. With the CTMU and Microchip's mTouch library, up to 21 touch channels can be implemented on the available I/O pins. The 40 MHz MIPS core is sufficient for slider/button decoding plus a small graphical UI driving an SPI TFT. The 2.3V to 3.6V supply range aligns with common 3.3V appliance rails.
おすすめ
IoT Sensor Hub / Edge Node
The PIC32MX130F064C-V/TL serves as a low-power sensor aggregation node that reads analog sensors via the 10-channel 10-bit ADC, communicates upstream via UART/SPI/I2C, and forwards data to an external Wi-Fi or LoRa module. The CTMU supports capacitive soil/moisture/touch sensors in agricultural and smart-building deployments. With 16 KB SRAM the part can buffer telemetry packets between uplink transmissions. Low-power sleep modes plus the RTCC enable duty-cycled battery operation.
おすすめ
Medical Monitoring Device
The 10-bit ADC and CTMU on PIC32MX130F064C-V/TL support patient-monitoring peripherals such as pulse oximeters, blood-pressure monitors, and portable infusion pump interfaces. The 64 KB Flash holds Microchip's USB CDC and HID stacks for tethered PC connectivity, while 21 I/O pins interface LCDs, keypads, and motor drivers. The V-grade -40C to +105C temperature range covers most clinical environments. Long-term Microchip silicon supply and AEC-Q100 availability ease regulatory submissions that share platforms with automotive siblings.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: PIC32MX130F064C-V/TL — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | PIC32MX130F064CT-I/TL | PIC32MX130F064C-I/TL | PIC32MX130F064C-50V/TL |
|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 36-VTLA (HVQCCN) 6x6 mm | 36-VTLA (HVQCCN) 6x6 mm - same | 36-VTLA (HVQCCN) 6x6 mm - same | 36-VTLA (HVQCCN) 6x6 mm - same |
| Flash | 64 KB | 64 KB | 64 KB | 64 KB |
| SRAM | 16 KB | 16 KB | 16 KB | 16 KB |
| Max CPU Clock | 40 MHz | 40 MHz | 40 MHz | 50 MHz |
| Temperature Grade | V (-40C to +105C) | I (-40C to +85C) | I (-40C to +85C) | V (-40C to +105C) |
| I/O Pins | 21 | 21 | 21 | 21 |
| AEC-Q100 | Yes | Yes | Yes | Yes |
主な差別化要因
- Extended V temperature grade with AEC-Q100 in the same VTLA-36 footprint （vs PIC32MX130F064C-I/TL)
- 40 MHz core with CTMU and dual I2S （vs PIC32MX130F064C-50V/TL)
- 36-VTLA 6x6 mm with exposed pad （vs PIC32MX130F064B-V/SS)
設計ノート
Decouple every VDD pin with a 100 nF ceramic capacitor placed within 5 mm of the pin, plus a single 10 uF bulk capacitor on the main 3.3 V rail. The MIPS core can draw transient bursts during Flash programming; insufficient decoupling causes spurious resets. Tie all VSS pins and the exposed pad to a single solid ground plane for both electrical and thermal performance.
Estimated: at 40 MHz CPU clock, VDD = 3.3 V and full peripheral activity, typical core current is around 30 mA, dissipating approximately 100 mW in the package. The 36-VTLA with exposed pad has theta_JA of roughly 30 C/W on a 4-layer 1 oz PCB, giving a junction rise of about 3 C above ambient - well within the 105 C V-grade limit. No external heatsink is required.
The 36-VTLA package requires a continuous ground plane under the exposed pad with multiple thermal vias (typically 9 to 16) stitching the pad to inner ground layers. Keep high-speed traces (USB D+/D-, SPI clock) at least 3x trace width away from analog ADC inputs. Use a 4-layer stackup with dedicated VDD and GND planes for noise-sensitive USB and ADC measurements.
Do not exceed 3.6 V on any VDD or I/O pin - the part is NOT 5V tolerant on most pins except those marked specifically. Use ICSP ICD pins (PGECx/PGEDx pairs) consistently - per Microchip, you can use any pair, but you must use them as a pair (for example PGEC2 with PGED2). Ensure JTAG pins are not repurposed for application I/O if you need boundary-scan debug.
コンプライアンス情報
RoHS compliant and AEC-Q100 qualified per Hotenda product page. MSL level not specified in verified web data and marked [DATA_NEEDED] in specs.
