TLV5627IPW - 8-Bit Quad DAC, Serial, TSSOP-16 | Texas Instruments
部品番号: TLV5627IPW ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $4.5 | $4.50 |
| 10 | $4.05 | $40.50 |
| 100 | $3.6 | $360.00 |
| 500 | $3.15 | $1,575.00 |
| 1,000 | $2.78 | $2,780.00 |
TLV5627IPW 概要
A digital-to-analog converter (DAC) is a mixed-signal integrated circuit that converts a digital codeword into a precision analog voltage or current; an 8-bit quad DAC like the TLV5627 delivers four such converters on one die with a shared digital interface, sitting within the broader hierarchy of converter ICs > data converters > signal chain > mixed-signal semiconductors. Unlike audio DACs that target continuous high-rate streaming, the TLV5627 is an industrial/multi-channel "set DAC" intended for bias voltages, trim references, programmable gain stages, and actuator control loops where four independent low-bandwidth analog outputs are required.
Key features include a glueless serial interface compatible with TMS320 DSP, SPI, QSPI, and Microwire ports, an on-chip reference input buffer, hardware and software-controlled power-down modes that cut consumption to a few milliwatts, and guaranteed monotonic output over the full -40C to +85C industrial temperature range. The four outputs share a common DAC reference, but each channel can be powered down independently for further energy savings.
Internally, the TLV5627 uses a resistor-string architecture with an output buffer amplifier per channel, providing low output impedance and the ability to drive 2 kohm loads directly. The dual-supply design separates the digital and analog domains (separate AVDD and DVDD pins), which is critical for noise-sensitive applications where digital switching transients must be isolated from the analog outputs.
Typical applications include industrial process control (PLC analog outputs), programmable sensor excitation, digital offset and gain trimming, four-channel waveform or bias generation in test & measurement, motor and valve control loops, and audio tone/signal generation where mid-fidelity is acceptable.
When designing with this device, ensure the AGND and DGND pins are joined at a single low-impedance point near the IC to prevent digital return currents from corrupting analog output accuracy. The reference input must be driven from a low-noise source, and the unused DAC outputs can be left open or tied to a defined voltage. Programming model: load data through the serial port (DIN, SCLK, FS) per the TI TLV5627 datasheet timing diagram.
This page consolidates real-time distributor pricing, drop-in compatible alternatives, and practical PCB/design notes beyond what the manufacturer datasheet alone provides.
ドロップイン代替品: TLV5627IPW — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
TLV5627IPWR
✅ ドロップイン📋 参考代替品（カタログ未掲載）
TLV5627IPWG4
✅ ドロップイン📋 参考代替品（カタログ未掲載）
TLV5627IPWRG4
✅ ドロップイン📋 参考代替品（カタログ未掲載）
TLV5627IDW
✅ ドロップイン📋 参考代替品（カタログ未掲載）
TLV5627CDW
✅ ドロップイン📋 参考代替品（カタログ未掲載）
TLV5627CPW
✅ ドロップイン📋 参考代替品（カタログ未掲載）
TLV5627IPW 最大定格＆電気的特性
| 分解能 | 8 bits |
| Number of Channels | 4 |
| Settling Time (Fast Mode) | 2.5 us typ |
| Settling Time (Slow Mode) | 8.5 us typ |
| Update Rate | 107 kSPS |
| Supply Voltage (AVDD/DVDD) | 2.7 V to 5.5 V |
| Digital Interface | 4-wire Serial (SPI / QSPI / Microwire / TMS320-compatible) |
| 出力タイプ | Voltage output (buffered) |
| Reference Input | External, with on-chip buffer |
| Power Consumption (Slow Mode, 5V) | 7 mW typ |
| Power Consumption (Slow Mode, 3V) | 3 mW typ |
| Monotonicity | Guaranteed monotonic over temperature |
| Power-Down Mode | Hardware and software controlled |
| 動作温度 | -40C to +85C |
| パッケージ | TSSOP-16 (PW) |
| 実装タイプ | Surface Mount |
| RoHS ステータス | Compliant |
TLV5627IPW ピン構成
| ピン 1 | AVDD — Analog supply voltage (2.7V to 5.5V) |
| ピン 2 | REFIN — Reference voltage input (with on-chip buffer) |
| ピン 3 | DACA — DAC channel A analog output |
| ピン 4 | DACB — DAC channel B analog output |
| ピン 5 | DACC — DAC channel C analog output |
| ピン 6 | DACD — DAC channel D analog output |
| ピン 7 | AGND — Analog ground |
| ピン 8 | DGND — Digital ground |
| ピン 9 | FS — Frame sync / chip select input |
| ピン 10 | SCLK — Serial clock input |
| ピン 11 | DIN — Serial data input |
| ピン 12 | LDAC — Load DAC (active low) - simultaneous update |
| ピン 13 | PD — Power-down input (active high) |
| ピン 14 | NC — Not connected (per datasheet) |
| ピン 15 | DVDD — Digital supply voltage (2.7V to 5.5V) |
| ピン 16 | NC — Not connected (per datasheet) |
主な用途
TLV5627IPW の用途: 7 件s: Industrial PLC Analog Output Module, Programmable Sensor Excitation / Bias, Digital Offset and Gain Trimming, Test & Measurement Bias Generation, Four-Channel Waveform / Setpoint Generator, Motor and Valve Control Loops, Audio Tone / Signal Generation (Mid-Fidelity).
Industrial PLC Analog Output Module
The TLV5627IPW is well suited for PLC analog output modules because four 8-bit DACs on a single die let one TSSOP-16 replace four discrete single-channel DACs. Per the TI TLV5627 datasheet, the 107 kSPS update rate and guaranteed monotonic -40C to +85C output give deterministic setpoint generation for valve positioners, 4-20 mA loop biasing, and process-variable reference channels. The 4-wire serial interface glues directly to the PLC's SPI master without external logic, while hardware and software power-down let idle modules drop to a few milliwatts. Compared with PWM-based analog emulation, the TLV5627IPW provides clean monotonic steps and eliminates the RC filter network that PWM solutions require.
おすすめ
Programmable Sensor Excitation / Bias
The TLV5627IPW's four buffered voltage outputs are ideal for driving the excitation or reference inputs of bridge sensors, RTDs, and thermistor bridges. According to the TI TLV5627 datasheet, each DAC channel can source enough current to bias a sensor bridge directly and the on-chip reference buffer accepts a system-wide 2.5V or 5V reference, simplifying the analog supply tree. The 8.5 us slow-mode settling time is sufficient for bias adjustment on thermal sensors that change slowly, while the 2.5 us fast mode supports higher-bandwidth strain-gauge circuits.
おすすめ
Digital Offset and Gain Trimming
For instrumentation and audio front-end trim, the TLV5627IPW delivers four independent 8-bit correction voltages that compensate for component tolerances. Per TI datasheet figures, the DAC's monotonic 8-bit resolution provides 256 trim levels per channel - adequate for nulling DC offsets in op-amp stages, calibrating ADC full-scale gain, and trimming resistor-mismatch errors in matched pairs. Its 2.7V to 5.5V operation lets it ride on the same supply rail as the analog front-end, simplifying the BOM.
おすすめ
Test & Measurement Bias Generation
The TLV5627IPW is widely used in test equipment to generate four independent programmable bias points, threshold levels, or stimulus amplitudes. According to the TI datasheet, the 107 kSPS update rate and 2.5 us fast settling time enable waveform stepping for production-line testers, while the four-channel integration lowers cost versus four discrete DACs. Independent per-channel power-down lets the engineer switch loads on and off digitally without external analog switches.
おすすめ
Four-Channel Waveform / Setpoint Generator
The TLV5627IPW's 107 kSPS update rate makes it capable of generating four simultaneous low-frequency waveforms - ramps, triangles, sine approximations, or arbitrary lookup-table patterns - for motor-control reference signals or function-generator sub-blocks. Per the TI TLV5627 datasheet, the glueless SPI/QSP/Microwire interface lets the host MCU stream new codes every 10 us, while dual AVDD/DVDD rails isolate the analog outputs from the digital switching noise generated during high-speed updates.
おすすめ
Motor and Valve Control Loops
The TLV5627IPW provides four buffered analog outputs that drive valve positioners, PWM-input motor controllers, and proportional solenoid drivers in industrial automation. According to the TI datasheet, the guaranteed monotonic output ensures smooth proportional control without step-induced oscillations, and the -40C to +85C industrial range covers factory-floor environments. Hardware-power-down pin lets a safety controller immediately de-energize all four outputs, a critical feature for fail-safe valve and motor shutdown.
おすすめ
Audio Tone / Signal Generation (Mid-Fidelity)
For non-critical audio applications such as alert tones, beep generators, and reference signal injection, the TLV5627IPW provides sufficient fidelity. Per the TI TLV5627 datasheet, with an external low-noise reference and the slow 8.5 us settling mode, the four DACs can generate quadraphonic test tones, alert melodies, or dual-tone multi-frequency (DTMF) signaling. The 8-bit resolution limits harmonic distortion to about 0.5% on full-scale sine waves, which is acceptable for alert and signaling use but not for high-end audio.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: TLV5627IPW — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | TLV5627IPWR | TLV5627IPWG4 | TLV5627IDW | TLV5627CDW | TLV5627CPW |
|---|---|---|---|---|---|---|
| Package | TSSOP-16 (PW) | TSSOP-16 (PW) - same | TSSOP-16 (PW) - same | SOIC-16 (DW) - 16-pin, different body | SOIC-16 (DW) - 16-pin, different body | TSSOP-16 (PW) - same |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Resolution | 8 bits | 8 bits | 8 bits | 8 bits | 8 bits | 8 bits |
| Channels | 4 | 4 | 4 | 4 | 4 | 4 |
| Update Rate | 107 kSPS | 107 kSPS | 107 kSPS | 107 kSPS | 107 kSPS | 107 kSPS |
| Settling Time (Fast) | 2.5 us | 2.5 us | 2.5 us | 2.5 us | 2.5 us | 2.5 us |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C (industrial) | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Packaging Format | Tube | Tape & Reel (2500/reel) | Tube (Pb-free) | Tape & Reel (Pb-free) | Tube (SOIC-16 wide) | Tube (SOIC-16 wide, commercial) |
主な差別化要因
- Industrial temperature range as standard （vs TLV5627CPW)
- Original tube packaging for low-volume / prototype （vs TLV5627IPWR)
- Wider pin-pitch 16-pin alternative for hand-soldered designs （vs TLV5627IDW)
設計ノート
Join AGND (pin 7) and DGND (pin 8) at a single low-impedance star point directly under the IC. Keep analog output traces short and away from SCLK/DIN/FS digital traces; route SCLK and FS on the opposite side of the PCB with ground isolation. Per the TI TLV5627 datasheet, dual AVDD/DVDD rails must be decoupled with 10 uF bulk + 0.1 uF ceramic placed within 5 mm of the respective supply pins.
AVDD and DVDD can be tied to a single 3.3V or 5V rail for simple designs, but for noise-sensitive applications drive them separately - AVDD from a filtered analog LDO post-regulator and DVDD directly from the digital rail. The on-chip reference input buffer requires the REFIN pin to be driven from a low-impedance source; a 0.1 uF ceramic between REFIN and AGND is recommended per the TI datasheet reference design.
Do not leave the LDAC pin floating - tie it logic-high for immediate DAC update on each SPI write, or logic-low if you intend to use it as a synchronized update gate. Floating LDAC can cause unpredictable timing. Per the TI TLV5627 datasheet, the FS pin must idle high between frames and must not be left low indefinitely. Avoid driving REFIN above AVDD, which permanently damages the reference buffer input.
The 4-wire SPI interface (DIN, SCLK, FS, LDAC) operates up to 20 MHz per the TI TLV5627 datasheet. Keep traces matched within 50 mils and add a 33 ohm series resistor at SCLK if the cable/trace length is more than 50 mm to dampen ringing. Glueless compatibility with TMS320/SPI/QSPI/Microwire eliminates the need for level shifters when interfacing to 3.3V or 5V MCUs sharing the same supply domain.
コンプライアンス情報
RoHS and REACH compliance per TI product folder; IPWG4/IPWRG4 suffixes explicitly denote Pb-free/Green finish. AEC-Q100 not applicable - this is an industrial-grade (not automotive-qualified) part; consult TI for Q1 automotive variants if required.
