5M160ZE64I5N vs 5M240ZT100I5N 비교

다음의 상세 나란히 비교: 5M160ZE64I5N 제조: Intel 및 5M240ZT100I5N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 5M160ZE64I5N 5M240ZT100I5N
브랜드 Intel Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 활성 활성
재고 상태 In Stock In Stock
단가 (USD) $4.13 $4.81
Device Family MAX V —
Logic Elements (LEs) 160 —
Macrocells 128 192
Maximum User I/O Pins 79 —
Pin-to-Pin Logic Delay (tPD) 7.5 ns —
User Flash Memory 4.0 Kbits 8 Kbit
Logic Array Blocks (LABs) 4 —
Supply Voltage - Core 3.3 V or 2.5 V —
I/O Bank Voltages 1.5 V / 1.8 V / 2.5 V / 3.3 V —
동작 온도 -40C to +100C (Industrial) -40 C to +100 C (Industrial)
패키지 64-pin EQFP (Exposed Pad) —
실장 유형 Surface Mount Surface Mount
JTAG Support Yes (IEEE 1149.1, TMS/TDI/TDO/TCK) —
Differential I/O LVDS, RSDS, mini-LVDS, LVPECL (emulated) —
Configuration Non-volatile on-chip flash, instant-on —
RoHS 상태 Compliant —
Family — MAX V
Series — 5M240Z
Device Type — CPLD (Complex Programmable Logic Device)
Logic Elements — 240
Maximum User I/O — 114
User I/O Pins (per datasheet) — 79
핀 수 — 100
Package Type — TQFP-100 (T100)
Package Body Size — 14 x 14 mm
Lead Pitch — 0.50 mm
Core Voltage (VCCINT) — 1.8 V
I/O Bank Voltage (VCCIO) — 1.2 V to 3.3 V (bank-dependent)
Speed Grade — -5
Maximum Internal Frequency — 118.3 MHz
Pin-to-Pin Delay (tPD1) — 7.5 ns (per datasheet header)
Programming Interface — JTAG (IEEE 1149.1) / ISP
Configuration Memory — Non-volatile flash (instant-on)
Lead-Free / RoHS — Yes (LEAD FREE per datasheet header)
MSL 레벨 — [DATA_NEEDED: MSL Level]
AEC-Q100 Automotive — Not qualified (Industrial grade)

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