5M240ZM68I5N vs 5M80ZM68I5N 비교
다음의 상세 나란히 비교: 5M240ZM68I5N 제조: Intel 및 5M80ZM68I5N 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | 5M240ZM68I5N | 5M80ZM68I5N |
|---|---|---|
| 브랜드 | Intel | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 활성 | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $1.25 | $4.15 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Series | MAX V | — |
| Logic Elements | 240 | — |
| Number of Macrocells | 192 | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Configuration Memory | Nonvolatile Flash | — |
| Package Type | TFBGA-68 | — |
| Number of Terminals | 68 (ball) | — |
| Package Code | TFBGA | — |
| Form of Terminal | Ball | — |
| Package Shape | Square | — |
| Operating Temperature Grade | Industrial | — |
| JTAG Interface | TMS, TDI, TDO, TCK (Bank 1) | — |
| Programming Method | JTAG / in-system programmable | — |
| 공급 전압 | [DATA_NEEDED: VCCINT and VCCIO levels] | — |
| I/O Standards | Multiple (LVTTL, LVCMOS, SSTL, etc., per MAX V doc; PCI and 1.2 V LVCMOS excluded for JTAG pins) | — |
| 실장 유형 | Surface Mount | Surface Mount |
| RoHS 상태 | Compliant | Compliant |
| Lead Free | Yes | — |
| Family | — | MAX V |
| Macro Cells | — | 64 |
| Logic Array Blocks (LABs) | — | 4 |
| Maximum Operating Frequency | — | 118.3 MHz |
| Pin-to-Pin Logic Delay (tPD) | — | 7.5 ns |
| User I/O Pins | — | 52 |
| User Flash Memory | — | 160 bits |
| Core Voltage (VCCINT) | — | 1.8 V (1.71 V to 1.89 V) |
| I/O Voltage (VCCIO) | — | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| 패키지 | — | 68-ball MBGA (5M80ZM68) |
| 동작 온도 | — | -40C to +100C (Industrial) |
| Programming Interface | — | JTAG (IEEE 1149.1) + ISP |
| Operating Mode | — | Non-volatile, instant-on |
| Lead-Free / Halogen-Free | — | Yes / Unknown |