EP1810GM883B vs EP1810LC-20T 비교

다음의 상세 나란히 비교: EP1810GM883B 제조: Altera 및 EP1810LC-20T 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EP1810GM883B EP1810LC-20T
브랜드 Altera Intel
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 NRND Obsolete
재고 상태 In Stock In Stock
단가 (USD) $125.40 $9.95
Device Family EP1810 (Classic EPLD) —
Macrocells 48 48
User Flip-Flops Up to 64 —
Total Inputs 60 —
Dedicated Inputs 12 —
I/O Pins 48 (bidirectional, tri-state) —
Propagation Delay (tPD) 50 ns max —
Supply Voltage (VCC) 4.5 V to 5.5 V 5 V
Technology CMOS, UV-erasable —
동작 온도 -55 °C to +125 °C (Military, MIL-STD-883B) 0C to +70C (commercial)
Package Type Ceramic Pin Grid Array (PGA), 84 pins PLCC-68 (J-lead)
Package Designator GM (ceramic PGA) —
Processing Level MIL-STD-883B (Class B) —
Programming Method UV-erasable / Altera programming hardware —
실장 유형 Through-hole (PGA socket or PCB through-hole) Surface Mount (socket-compatible)
Lead-Free / RoHS [DATA_NEEDED: lead-free status] —
Logic Family TTL-compatible I/O —
Family — Altera Classic EPLD
Product Type — CPLD (Complex Programmable Logic Device)
Usable Gates — 900 gates
Logic Array Blocks (LABs) — 4 x 12 macrocells
Maximum Toggle Frequency — 50 MHz
Pin-to-Pin Logic Delay (tPD) — 20 ns
Configuration Memory — On-chip EEPROM (non-volatile)
Programming Interface — JTAG (IEEE 1149.1) and Altera Master/Slave serial
Shipping Format — Tape & Reel ("T" suffix)
RoHS 상태 — Non-compliant (legacy 5V PLCC)

데이터시트 & 자료

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