EP1810LI-45 vs EP1810JI-45 비교

다음의 상세 나란히 비교: EP1810LI-45 제조: Rochester Electronics 및 EP1810JI-45 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EP1810LI-45 EP1810JI-45
브랜드 Rochester Electronics Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 활성 Obsolete
재고 상태 In Stock In Stock
단가 (USD) $64.10 $9.75
Product Type EPLD (Erasable Programmable Logic Device) —
Family Altera Classic —
Usable Gates 900 —
Macrocells 48 —
Maximum User I/O 64 inputs / 48 outputs —
Pin-to-Pin Logic Delay (tPD) 45 ns —
Counter Frequency (fCNT) up to 100 MHz —
Setup Time (tSU) [DATA_NEEDED: setup time] —
Technology CMOS, UV-erasable EPROM configuration CMOS EPROM
공급 전압 5 V 5 V (TTL compatible)
동작 온도 범위 -40 C to +85 C (Industrial, 'I' suffix) —
패키지 68-pin PLCC / PQCC68 (J-Lead) —
Logic Blocks 12 LABs of 4 macrocells each —
Configuration Memory Non-volatile UV-erasable EPROM —
Programming Method Altera programming hardware with MAX+PLUS II / legacy tools UV-erase (windowed) / OTP via JEDEC
RoHS 상태 [DATA_NEEDED: RoHS status] —
Manufacturer Rochester Electronics (licensed continuation of Altera / Intel PSG Classic EPLD line) Altera (now Intel FPGA)
Series — Classic EPLD Family
Device Type — UV-Erasable / OTP Complex PLD
Macrocell Count — 48
Maximum Operating Frequency — 33.3 MHz
Propagation Delay (tPD) — 50 ns
Configurable I/O Lines — 48
Dedicated Inputs — 12
Package Code — QCCJ
Package Type — 68-pin JLCC (J-leaded ceramic chip carrier)
Terminal Form — J BEND
Package Shape — SQUARE
Number of Terminals — 68
Temperature Grade — INDUSTRIAL
동작 온도 — -40 °C to +85 °C

데이터시트 & 자료

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