EP1K30TI144-3 vs EP1K30TI144-3N 비교
다음의 상세 나란히 비교: EP1K30TI144-3 제조: Altera 및 EP1K30TI144-3N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EP1K30TI144-3 | EP1K30TI144-3N |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | NRND | NRND |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $21.40 | $21.80 |
| Product Type | FPGA (Field Programmable Gate Array) | — |
| Series | ACEX 1K | EP1K30 |
| Typical Gate Count | 30,000 gates | — |
| Logic Elements | 1,728 | 1,728 |
| Embedded Memory (RAM bits) | 24,576 bits | — |
| Maximum User I/O | 102 | — |
| Dedicated Input Pins | 6 | 6 |
| Total Package Terminals | 144 | — |
| Supply Voltage VCCINT | 2.5 V (min 2.375 V, max 2.625 V) | — |
| I/O Logic Levels | 1.8 V / 2.5 V / 3.3 V (multi-voltage I/O banks) | — |
| 동작 온도 | -40 °C to +85 °C (industrial) | -40C to +85C (Industrial) |
| 패키지 | 144-pin TQFP (LQFP, 0.5 mm pitch) | TQFP-144 (0.5 mm pitch) |
| Speed Grade | -3 | -3 (fastest in EP1K30 family) |
| Temperature Grade Code | TI (Industrial) | — |
| Configuration Method | SRAM-based, JTAG (IEEE 1149.1) / serial/parallel PROM | — |
| Process Technology | CMOS | 0.18 um CMOS, 4 metal layers |
| 실장 유형 | Surface Mount | Surface Mount (Gull-Wing) |
| RoHS 상태 | [DATA_NEEDED: RoHS status not in provided data] | [DATA_NEEDED: RoHS status] |
| Family | — | ACEX 1K |
| Typical Gates | — | 30,000 |
| Usable Gates | — | 17,500 |
| Embedded Memory (EAB) | — | 24 Kbit (6 EABs of 4 Kbit each) |
| Maximum User I/O Pins | — | 102 |
| Total Terminals | — | 144 |
| Core Supply Voltage | — | 2.5 V nominal (2.375 V min, 2.625 V max) |
| Configuration Modes | — | Passive Serial, Passive Parallel Async, Passive Parallel Sync, JTAG (IEEE 1149.1) |
| PLLs | — | 4 |
| Thermal Resistance (theta_JA) | — | Approximately 35-40 C/W (PCB-dependent) |