EP20K400CB652C9ES vs EP20K400CB652I7 비교
다음의 상세 나란히 비교: EP20K400CB652C9ES 제조: Intel 및 EP20K400CB652I7 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EP20K400CB652C9ES | EP20K400CB652I7 |
|---|---|---|
| 브랜드 | Intel | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | NRND | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $195.00 | $149.50 |
| Series | APEX 20KC | — |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements / Cells | 16640 | — |
| Total System Gates | 400000 | — |
| Embedded Memory (Bits) | 212992 | — |
| Number of User I/O | 488 | — |
| Number of LABs/CLBs | [DATA_NEEDED: LAB count] | — |
| Number of Logic Array Blocks | 1040 | — |
| Maximum Operating Frequency | 250 MHz | 375.94 MHz |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS |
| 동작 온도 범위 | 0°C to +85°C (Commercial) | — |
| 실장 유형 | Surface Mount | — |
| 패키지 / 케이스 | 652-BGA | — |
| MSL 레벨 | 3 (168 Hours) | — |
| Packaging | Tray | — |
| Programmability Type | In-system programmable (SRAM-based) | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL | — |
| JTAG (IEEE 1149.1) | Yes | — |
| PLL | Yes (4-phase) | — |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | Non-compliant (JESD-609 e0, contains lead) |
| Device Family | — | Field-Programmable Gate Array (FPGA) |
| Typical Gates | — | 400,000 |
| Logic Elements (LEs) | — | 16,640 |
| Core Supply Voltage | — | 1.8 V |
| I/O Supply Voltage | — | 1.8 V / 3.3 V |
| 패키지 | — | BGA-652 (652-ball) |
| Package Code (JESD-30) | — | S-PBGA-B652 |
| Terminal Form | — | Ball |
| Package Shape | — | Square |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O] |
| Embedded Memory | — | Embedded System Blocks (ESB) - dual-port RAM / FIFO / CAM |
| Configuration Method | — | SRAM + JTAG (ISP) |
| Speed Grade | — | 7 |
| Temperature Grade | — | Industrial (-40 °C to +100 °C) |
| Manufacturer Status | — | Obsolete (Intel/Altera legacy FPGA) |