EP20K60EFI144-2X vs EP20K60EFC144-2XN 비교
다음의 상세 나란히 비교: EP20K60EFI144-2X 제조: Altera 및 EP20K60EFC144-2XN 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EP20K60EFC144-2XN - APEX-20KE FPGA 60K Gates 93 I/O 144-BGA | Intel/Altera
EP20K60EFC144-2XN Nrnd사양 비교
| 파라미터 | EP20K60EFI144-2X | EP20K60EFC144-2XN |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | NRND | NRND |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $65.00 | $152.00 |
| Device Family | APEX 20KE | — |
| Typical Gates | 60,000 | — |
| Logic Elements | 2,560 | — |
| Maximum Operating Frequency | 200 MHz | — |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage (VCCINT) | 1.8 V (range 1.71 V to 1.89 V) | 1.71 V to 1.89 V |
| Propagation Delay (tpd) | 2.41 ns | — |
| User I/O Pins | 93 | — |
| Dedicated Inputs | 4 | — |
| Total Terminals | 144 | — |
| Package Type | FBGA-144 (FineLine BGA, LBGA) | 144-BGA (Fine-pitch Ball Grid Array) |
| Package Code | LBGA | — |
| Terminal Form | Ball | — |
| Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| I/O Standard Support | LVDS, 1.8 V I/O | — |
| Speed Grade | -2 (industrial, -2X suffix) | -2 (per MPN suffix) |
| 동작 온도 | -40 °C to +85 °C | — |
| Configuration Interface | JTAG (IEEE 1149.1) / serial PROM / parallel PROM | — |
| 습도 민감도 레벨 (MSL) | 3 | — |
| 실장 유형 | Surface Mount | Surface Mount |
| RoHS 상태 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Series | — | APEX-20KE |
| Family | — | APEX-20K (MultiCore Architecture) |
| Typical Gate Count | — | 60,000 gates |
| Logic Elements / Embedded Array Blocks | — | 2,560 |
| Embedded Memory (Bits) | — | 32,768 |
| Maximum User I/O | — | 93 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| I/O Supply Voltage (VCCIO) | — | [DATA_NEEDED: VCCIO range] |
| Package Code (per MPN suffix) | — | FBGA / LBGA, 13x13 mm |
| Operating Temperature (TJ) | — | 0 C to +85 C (commercial) |
| Configuration Method | — | JTAG (IEEE 1149.1), Passive Serial, Parallel |
| Logic Family | — | CMOS, SRAM-based LUT |