EP20K60EFI144-2X vs EP20K60EFC144-2XN Comparação
Comparação detalhada lado a lado de EP20K60EFI144-2X por Altera e EP20K60EFC144-2XN por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Altera
EP20K60EFC144-2XN - APEX-20KE FPGA 60K Gates 93 I/O 144-BGA | Intel/Altera
EP20K60EFC144-2XN NrndComparação de especificações
| Parâmetro | EP20K60EFI144-2X | EP20K60EFC144-2XN |
|---|---|---|
| Marca | Altera | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | NRND | NRND |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $65,00 | $152,00 |
| Device Family | APEX 20KE | — |
| Typical Gates | 60,000 | — |
| Logic Elements | 2,560 | — |
| Maximum Operating Frequency | 200 MHz | — |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage (VCCINT) | 1.8 V (range 1.71 V to 1.89 V) | 1.71 V to 1.89 V |
| Propagation Delay (tpd) | 2.41 ns | — |
| User I/O Pins | 93 | — |
| Dedicated Inputs | 4 | — |
| Total Terminals | 144 | — |
| Package Type | FBGA-144 (FineLine BGA, LBGA) | 144-BGA (Fine-pitch Ball Grid Array) |
| Package Code | LBGA | — |
| Terminal Form | Ball | — |
| Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| I/O Standard Support | LVDS, 1.8 V I/O | — |
| Speed Grade | -2 (industrial, -2X suffix) | -2 (per MPN suffix) |
| Temperatura de operação | -40 °C to +85 °C | — |
| Configuration Interface | JTAG (IEEE 1149.1) / serial PROM / parallel PROM | — |
| Nível de sensibilidade à umidade (MSL) | 3 | — |
| Tipo de montagem | Surface Mount | Surface Mount |
| Status RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Series | — | APEX-20KE |
| Family | — | APEX-20K (MultiCore Architecture) |
| Typical Gate Count | — | 60,000 gates |
| Logic Elements / Embedded Array Blocks | — | 2,560 |
| Embedded Memory (Bits) | — | 32,768 |
| Maximum User I/O | — | 93 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| I/O Supply Voltage (VCCIO) | — | [DATA_NEEDED: VCCIO range] |
| Package Code (per MPN suffix) | — | FBGA / LBGA, 13x13 mm |
| Operating Temperature (TJ) | — | 0 C to +85 C (commercial) |
| Configuration Method | — | JTAG (IEEE 1149.1), Passive Serial, Parallel |
| Logic Family | — | CMOS, SRAM-based LUT |