EP2A25F672C7N vs EP2A25F672C9N 비교

다음의 상세 나란히 비교: EP2A25F672C7N 제조: Altera 및 EP2A25F672C9N 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EP2A25F672C7N EP2A25F672C9N
브랜드 Altera Intel
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $195.00 $195.00
Family APEX II APEX II
Logic Elements 24,320 cells —
System Gates Approximately 900,000 Approx. 900000
User I/Os 492 —
Propagation Delay (tPD) 1.69 ns —
Internal Operating Frequency Up to 500 MHz —
Core Voltage (VCCINT) 1.5 V —
Process Technology 0.15 µm all-layer copper (up to 8 metal layers) 0.15 µm all-layer copper, up to 8 metal layers
Logic Family CMOS CMOS
Package Type 672-ball FC-FBGA (FineLine BGA) —
Package Body Size 27 x 27 mm —
Ball Pitch 1.0 mm —
동작 온도 0 °C to 85 °C (commercial) 0 °C to +85 °C (commercial, C9 grade)
High-Speed I/O Support True-LVDS, LVPECL, PCML, HyperTransport up to 1 Gbps —
Programmable Logic Type Loadable PLD (in-system programmable) —
Embedded Memory Embedded System Blocks (ESB) configurable as dual-port RAM/ROM Enhanced System Blocks (ESBs) for dual-port RAM
PLLs Up to 4 —
실장 유형 Surface Mount Surface Mount (BGA)
RoHS 상태 [DATA_NEEDED: RoHS compliance] Compliant (per distributor listings)
Logic Elements / Cells — 24320
Maximum User I/O — 492
Operating Frequency — 236 MHz
Core Supply Voltage (VCCINT) — 1.425 V to 1.575 V (nominal 1.5 V)
패키지 — 672-ball FineLine BGA (F672), 27 × 27 mm, 1.00 mm pitch
Seated Height (max) — 2.100 mm
Propagation Delay — 2.23 ns
I/O Standards Supported — LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, LVDS, LVPECL, PCML, HyperTransport
LVDS Data Rate — Up to 1 Gbps (True-LVDS)
Configuration Interface — Serial / Parallel PROM, JTAG, passive parallel (enhanced)
Design Software — Quartus II (v5.1 or later)

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