EP2A25F672I-7 vs EP2A25F672C9N 비교
다음의 상세 나란히 비교: EP2A25F672I-7 제조: Intel 및 EP2A25F672C9N 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EP2A25F672I-7 | EP2A25F672C9N |
|---|---|---|
| 브랜드 | Intel | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $171.00 | $195.00 |
| Family | APEX II | APEX II |
| Manufacturer | Intel (formerly Altera) | — |
| Device Type | FPGA (Field-Programmable Gate Array) | — |
| System Gates | 900K (approximately) | Approx. 900000 |
| Logic Cells / Elements | 24,320 | — |
| Maximum Operating Frequency | 500 MHz | — |
| Process Technology | 0.15 um | 0.15 µm all-layer copper, up to 8 metal layers |
| Core Voltage | 1.5 V | — |
| 패키지 | 672-pin FC-FBGA | 672-ball FineLine BGA (F672), 27 × 27 mm, 1.00 mm pitch |
| 실장 유형 | Surface Mount (Flip-Chip BGA) | Surface Mount (BGA) |
| Speed Grade | -7 | — |
| 동작 온도 | -40C to +85C (Industrial) | 0 °C to +85 °C (commercial, C9 grade) |
| Temperature Grade | Industrial (I) | — |
| Configuration Method | JTAG, Passive Serial, Active Serial | — |
| JTAG Support | IEEE 1149.1 Boundary Scan | — |
| RoHS 상태 | [DATA_NEEDED: rohs status] | Compliant (per distributor listings) |
| MSL 레벨 | [DATA_NEEDED: MSL level] | — |
| Embedded Memory | ESBs (Embedded System Blocks) | Enhanced System Blocks (ESBs) for dual-port RAM |
| Logic Elements / Cells | — | 24320 |
| Maximum User I/O | — | 492 |
| Operating Frequency | — | 236 MHz |
| Core Supply Voltage (VCCINT) | — | 1.425 V to 1.575 V (nominal 1.5 V) |
| Seated Height (max) | — | 2.100 mm |
| Propagation Delay | — | 2.23 ns |
| Logic Family | — | CMOS |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, LVDS, LVPECL, PCML, HyperTransport |
| LVDS Data Rate | — | Up to 1 Gbps (True-LVDS) |
| Configuration Interface | — | Serial / Parallel PROM, JTAG, passive parallel (enhanced) |
| Design Software | — | Quartus II (v5.1 or later) |