EP2A25F672I8 vs EP2A25F724 비교

다음의 상세 나란히 비교: EP2A25F672I8 제조: Altera 및 EP2A25F724 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EP2A25F672I8 EP2A25F724
브랜드 Altera Altera
카테고리 FPGA & CPLD Memory ICs
수명 주기 상태 Obsolete NRND
재고 상태 In Stock In Stock
단가 (USD) $125.00 $112.00
Family APEX II —
Logic Elements / Cells 24,320 —
Equivalent Gates 900,000 —
Embedded Memory (RAM bits) 622,592 —
User I/Os 492 —
Number of PLLs 4 —
Process Technology 0.15 µm CMOS, up to 8 metal layers —
Core Supply Voltage 1.5 V —
Propagation Delay 1.69 ns (typical) —
Internal Performance 333 MHz (per legacy datasheet) —
LVDS / High-Speed I/O Yes, up to 1 Gbps —
패키지 672-ball FC-FBGA (FineLine BGA), 27 × 27 mm, 1 mm pitch 724-ball FineLine BGA
실장 유형 Surface Mount (BGA) Surface Mount (BGA)
동작 온도 –40 °C to +85 °C (industrial, 'I' grade) [DATA_NEEDED: operating temperature grade]
Speed Grade I8 (industrial, 8-speed-grade per APEX II ordering scheme) —
JTAG / Boundary Scan IEEE 1149.1 compliant —
I/O Standards Supported LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, GTL+, PCI —
RoHS 상태 unknown Compliant
Lead-Free Status unknown —
Device Type — Enhanced Configuration Device (EPC)
Target FPGA Family — Altera APEX II (EP2A-series)
Memory Technology — Flash (non-volatile, no battery required)
Configuration Modes — Passive Serial, Passive Parallel Async, Passive Parallel Sync
JTAG Support — IEEE Std. 1149.1 (boundary-scan / ISP)
Multi-Device Configuration — Yes - supports daisy-chained APEX II FPGAs
In-System Programmability — Yes (via JTAG)
공급 전압 — [DATA_NEEDED: VCC nominal]
On-chip Oscillator — Yes (internal configuration clock)
User Flash Region — Yes (separate from configuration data)
수명 주기 상태 — Not Recommended for New Designs (NRND) - Altera acquired by Intel 2015

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