EP2A25F672I8 vs EP2A40F33I-8 비교
다음의 상세 나란히 비교: EP2A25F672I8 제조: Altera 및 EP2A40F33I-8 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EP2A25F672I8 | EP2A40F33I-8 |
|---|---|---|
| 브랜드 | Altera | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $125.00 | $95.00 |
| Family | APEX II | APEX II |
| Logic Elements / Cells | 24,320 | — |
| Equivalent Gates | 900,000 | — |
| Embedded Memory (RAM bits) | 622,592 | — |
| User I/Os | 492 | — |
| Number of PLLs | 4 | — |
| Process Technology | 0.15 µm CMOS, up to 8 metal layers | — |
| Core Supply Voltage | 1.5 V | — |
| Propagation Delay | 1.69 ns (typical) | — |
| Internal Performance | 333 MHz (per legacy datasheet) | — |
| LVDS / High-Speed I/O | Yes, up to 1 Gbps | — |
| 패키지 | 672-ball FC-FBGA (FineLine BGA), 27 × 27 mm, 1 mm pitch | 672-ball FineLine BGA (F33) |
| 실장 유형 | Surface Mount (BGA) | — |
| 동작 온도 | –40 °C to +85 °C (industrial, 'I' grade) | — |
| Speed Grade | I8 (industrial, 8-speed-grade per APEX II ordering scheme) | -8 |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, GTL+, PCI | — |
| RoHS 상태 | unknown | [DATA_NEEDED: RoHS status] |
| Lead-Free Status | unknown | — |
| Manufacturer | — | Intel (formerly Altera) |
| Device Type | — | FPGA (Field-Programmable Gate Array) |
| Typical Gates | — | 1,500,000 |
| Logic Elements (LEs) | — | 40,960 |
| Embedded System Memory | — | 425,984 bits |
| Maximum User I/O | — | 672 |
| Temperature Grade | — | Industrial (-40 °C to +85 °C) |
| PLLs | — | 4 |
| High-Speed Clock Pins | — | 16 |
| Configuration Method | — | SRAM (volatile) - external PROM required |
| Moisture Sensitivity Level | — | MSL 3 |
| Peak Reflow Temperature | — | 220 °C |