EP2S60F1020I4 vs EP2S60F1020C4N 비교

다음의 상세 나란히 비교: EP2S60F1020I4 제조: Altera 및 EP2S60F1020C4N 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EP2S60F1020I4 EP2S60F1020C4N
브랜드 Altera Intel
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 NRND Obsolete
재고 상태 In Stock In Stock
단가 (USD) $1,454.92 $67.00
Manufacturer Intel / Altera —
Series Stratix II Stratix II
Logic Elements (LEs) 60,440 —
Embedded Memory (bits) 2,544,192 2,544,192
Number of LABs/CLBs 3022 —
Number of CLBs 24176 —
Maximum User I/O 718 —
Number of I/O Banks [DATA_NEEDED: number of I/O banks] —
Operating Voltage (Core) 1.2 V —
Process Technology 90 nm CMOS 90 nm CMOS
Temperature Grade Industrial (-40C to +100C TJ) —
Package Type 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) —
Package Dimensions 33 mm x 33 mm —
Ball Pitch 1.0 mm —
실장 유형 Surface Mount Surface Mount (BGA)
Configuration Method Passive Serial / Fast Passive Parallel / JTAG —
Number of PLLs 12 —
Global Clock Networks 16 —
Embedded Multipliers (18x18) 36 —
Transceiver Count 0 (no embedded transceivers) —
Maximum Embedded Memory Bandwidth [DATA_NEEDED: memory bandwidth spec] —
RoHS 상태 Non-compliant (contains lead per legacy Altera package) EU RoHS compliant with exemption (per Arrow listing)
Family — Stratix II (EP2S60)
Logic Elements — 60,440
Adaptive Logic Modules (ALMs) — 30,220 (approx.)
Logic Array Blocks (LABs) — 3,022
Embedded Memory Blocks — M512/M4K/M-RAM TriMatrix memory
DSP Blocks (18-bit x 18-bit) — Up to 48 (24 per DSP block column pair typical)
User I/Os — 718
Maximum Core Frequency — 711.24 MHz (per Arrow listing)
Core Voltage — 1.2 V
패키지 — 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA)
Operating Temperature Grade — Commercial (C4 suffix indicates commercial, speed grade 4)
Configuration Modes — Passive Serial, Fast Passive Parallel, JTAG
PLLs / Clock Networks — Yes - on-chip PLLs and global clock networks

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