EP3SE50F484C4N vs EP3SE50F484I4LN 비교

다음의 상세 나란히 비교: EP3SE50F484C4N 제조: Altera 및 EP3SE50F484I4LN 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EP3SE50F484C4N EP3SE50F484I4LN
브랜드 Altera Intel
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 NRND Obsolete
재고 상태 In Stock In Stock
단가 (USD) $468.11 $895.00
Family Stratix III E Stratix III E
Logic Elements 47,500 —
Number of LABs/CLBs 1,900 —
Total RAM Bits 5,760 Kbit —
Number of I/O 296 —
Number of PLLs 4 —
Maximum Operating Frequency 450 MHz —
Core Voltage 1.1 V —
Process Technology 65 nm —
패키지 484-BBGA, FCBGA 484-ball FBGA (FineLine BGA)
실장 유형 Surface Mount —
동작 온도 0C to +85C (Commercial) -40C to +100C (industrial I4 grade)
Supplier Device Package 484-FBGA (23x23 mm) —
RoHS 상태 [DATA_NEEDED: rohs_status] Compliant (LN suffix indicates lead-free)
Lead Free [DATA_NEEDED: lead_free_status] —
습도 민감도 레벨 (MSL) 3 (168 Hours) —
Logic Elements (LE) — 47,500
Logic Array Blocks (LABs) — 1,900
Embedded Memory — 5.76 Mbit (estimated from 47.5K LE family)
User I/O Count — 296
Process Node — 65 nm
Core Voltage (VCCINT) — 0.9 V
Auxiliary Voltage (VCCAUX) — 1.1 V
I/O Voltage (VCCIO) — 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.0 V (bank-dependent)
Pin/Pitch — 484 balls, 1.0 mm pitch
Configuration — SRAM-based (external flash/EPCS required)
Lead-Free — Yes (LF / N suffix indicates lead-free)
Transceivers — 0 (F484 package does not include transceiver banks)
PLL Count — Up to 12 (estimated for Stratix III E family)
DSP Blocks (18x18 Multipliers) — [DATA_NEEDED: DSP block count]
Design Tool — Quartus II (legacy, support via Altera/Intel subscription)

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