EP610DC-25 vs EP610DC-30 비교
다음의 상세 나란히 비교: EP610DC-25 제조: Rochester Electronics 및 EP610DC-30 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Rochester Electronics
EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester
EP610DC-25 ✓ 활성
사양 비교
| 파라미터 | EP610DC-25 | EP610DC-30 |
|---|---|---|
| 브랜드 | Rochester Electronics | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 활성 | NRND |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $9.95 | $10.40 |
| Family | Altera Classic EPLD | EP610 (Classic Device Family) |
| Product Type | EPLD (Erasable Programmable Logic Device) | Classic EPLD (Erasable Programmable Logic Device) |
| Macrocells | 16 | 16 |
| Equivalent Gates | 300 | — |
| Maximum Propagation Delay (tPD) | 25 ns | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| Number of I/O Pins | 22 | — |
| Number of Dedicated Inputs | 4 | — |
| Total Pin Count | 24 | — |
| 패키지 | 24-pin CDIP (Ceramic DIP, through-hole) | 24-pin CERDIP (windowed) |
| 실장 유형 | Through Hole | Through-Hole |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| 동작 온도 | 0 C to +70 C | Commercial (0C to +70C) |
| Technology | CMOS EPROM (UV-erasable) | CMOS EPROM |
| Programming Method | JEDEC fuse-map / UV-erase | — |
| Speed Grade Suffix | -25 (25 ns tPD) | — |
| Logic Expanders | — | 4 (4 product terms per macrocell) |
| Usable Gates | — | 300 |
| Maximum Pipelined Clock Frequency | — | 100 MHz |
| Propagation Delay (tPD) | — | 30 ns |
| Dedicated Inputs | — | 16 |
| I/O Pins | — | 16 (with output enable) |
| Speed Grade | — | -30 (30 ns tPD) |
| Programmability | — | UV-erasable, windowed EPROM |
| Security Bit | — | Yes (protects design after programming) |
| Output Modes | — | Registered and Combinatorial |