EP610DI-30 vs EP610DC-35 비교
다음의 상세 나란히 비교: EP610DI-30 제조: Rochester Electronics 및 EP610DC-35 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Rochester Electronics
EP610DI-30 - 16-Macrocell Classic EPLD, 30ns, CERDIP-24 | Rochester Electronics
EP610DI-30 ✓ 활성
사양 비교
| 파라미터 | EP610DI-30 | EP610DC-35 |
|---|---|---|
| 브랜드 | Rochester Electronics | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 활성 | NRND |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $23.50 | $18.40 |
| Device Type | EPLD (Erasable Programmable Logic Device) | CPLD - Classic EPLD |
| Family | Classic EP610 | Altera Classic EP610 |
| Macrocells | 16 | 16 |
| Propagation Delay (tPD) | 30 ns | 35 ns |
| Pipelined Data Rate | 100 MHz | up to 100 MHz |
| Technology | CMOS | — |
| 공급 전압 | 5 V (single supply) | — |
| 패키지 | CERDIP-24 (windowed, UV-erasable) | 24-pin CDIP (windowed CERDIP) 0.300 inch |
| 실장 유형 | Through-Hole | Through-Hole (DIP) |
| Programmable Elements | EPROM (UV-erasable, windowed) | — |
| 동작 온도 | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) [DATA_NEEDED: explicit range from datasheet] |
| I/O Pins | [DATA_NEEDED: I/O pin count] | — |
| Logic Capacity | [DATA_NEEDED: usable gates / logic capacity] | — |
| RoHS 상태 | unknown | [DATA_NEEDED: not explicitly confirmed in retrieved data; CERDIP packages typically non-RoHS] |
| Lead-Free | unknown | — |
| Original Manufacturer | Altera (now Intel) | — |
| Current Supplier | Rochester Electronics (authorized continuing source) | — |
| MSL 레벨 | N/A (through-hole, non-surface-mount) | — |
| Usable Gates | — | 300 |
| Maximum Frequency (fMAX) | — | 28.6 MHz |
| Supply Voltage (VCC) | — | 5 V |
| Process Technology | — | CMOS |
| Program/erase Method | — | UV-erasable (windowed CERDIP) |
| Manufacturer | — | Originally Altera; today supplied via Rochester Electronics (authorized) |