EP610PI-25 vs EP610IPC-25 비교
다음의 상세 나란히 비교: EP610PI-25 제조: Rochester Electronics 및 EP610IPC-25 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Rochester Electronics
EP610PI-25 - 16-Macrocell Classic EPLD, 25ns DIP-24 | Rochester
EP610PI-25 Obsolete사양 비교
| 파라미터 | EP610PI-25 | EP610IPC-25 |
|---|---|---|
| 브랜드 | Rochester Electronics | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | NRND |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $20.50 | $8.85 |
| Product Type | Erasable Programmable Logic Device (EPLD) | — |
| Series | Classic EP610 | — |
| Macrocells | 16 | — |
| Usable Gates | ~300 gates | — |
| Propagation Delay (tPD) | 25 ns | — |
| Maximum Internal Frequency (fCNT) | [DATA_NEEDED: fCNT] | — |
| Number of Dedicated Inputs | 4 | — |
| Number of Bidirectional I/O Pins | 16 | — |
| 패키지 | 24-pin DIP (PI) ceramic through-hole | 24-pin PDIP (Plastic DIP) |
| 동작 온도 범위 | Industrial (I suffix): -40C to +85C | — |
| Supply Voltage (VCC) | 5 V nominal | 4.75 V to 5.25 V |
| Process Technology | CMOS, UV-erasable | — |
| Programmable Flip-Flop Modes | D, T, JK, SR (per macrocell) | — |
| Global Clock Pins | 1 | — |
| 실장 유형 | Through-Hole (DIP) | Through-Hole |
| Lead-Free / RoHS | [DATA_NEEDED: RoHS] | — |
| Original Manufacturer | Altera (now Intel PSG; legacy stock from Rochester Electronics) | — |
| Family | — | Classic EPLD (EP610) |
| Architecture | — | PAL-type, CMOS, Erasable |
| Propagation Delay (tpd) | — | 25 ns (max) |
| Maximum Inputs | — | 20 |
| Maximum I/O Pins | — | 16 |
| Dedicated Outputs | — | 16 |
| Product Terms | — | 160 |
| 동작 온도 | — | 0 °C to +70 °C (Commercial) |
| Technology | — | CMOS, UV-erasable (windowless in IPC pkg) |
| TTL Compatibility | — | 100% TTL emulation |
| MSL 레벨 | — | [DATA_NEEDED: MSL level] |
| RoHS 상태 | — | Non-compliant (contains Pb, PDIP package) |
| Logic Capacity | — | Equivalent to ~24 standard 24-pin PALs |